Table of Contents

• A 100A 48-60V to 1V Hybrid LLC Resonant Converter with 51mV Droop for a 70A/20ns Load TransientZeguo Liu, Zhiren Luo, Xiangan You, Dongjie Ye, Weiyi Tang, Qinyang Wang, Qidong Wang, Jianliang Shen, Lin Cheng. 1-3 [doi]
• A Timing-Robust 10b 13GS/s ADC with Analog Fourier Transform Based Frequency InterleavingXingchen Chao, Yunqiang Xu, Qiang Yu, Zheng Zhu, Sanfeng Zhang, Qiang Li 0021. 1-3 [doi]
• A 22nm 29.3TOPS/W End-to-End CIM-Utilization-Aware Accelerator with Reconfigurable 4D-CIM Mapping and Adaptive Feature Reuse for Diverse CNNs and TransformersJin Wang, Moxiao Lou, Zhengke Yang, Ruijie Peng, Humiao Li, Weirong Dong, Haoran Lyu, Yida Li, Jiamin Li, Hao Yu 0001, Jerald Yoo, Longyang Lin. 1-3 [doi]
• SparseTrim: A Neural Network Accelerator Featuring On-Chip Decompression of Fine-Grained Sparse Model with 10.1TOPS/W System Energy EfficiencyJieyu Li, Weifeng He, Boran Jiang, Xinyu Wang, Guanghui He, Dingxuan Liu, Mingoo Seok. 1-3 [doi]
• Cryogenic CMOS Circuits for Future Scaled Quantum Computing Systems: Challenges and SolutionsBodhisatwa Sadhu, Kevin Tien, Sudipto Chakraborty, David J. Frank, Pat Rosno, Daniel Moertl, Mark Yeck, John F. Bulzacchelli, Daniil Frolov, Devin Underwood, Ken Inoue, Christian W. Baks, Daniel Ramirez, Jeremy Ekman, Ryan Black, Timothy J. Schmerbeck, Ray Richetta, Dereje Yilma, Andrew Davies, Joseph A. Glick, Dorothy Wisnieff, Bryce Snell, John Timmerwilke, Raphael Robertazzi, George Zettles, Scott Lekuch, Scott Willenborg, Brian P. Gaucher, Daniel J. Friedman. 1-3 [doi]
• A Phase-Locked Minimum-Energy-Point-Tracking Enabled by Unified-Clock-Power-and-Body-Bias Slack Regulation and PI-Ratio Based In-Situ Loop Gain Optimization with 97.4% Supply Voltage Margin Recovery at Minimum-Energy-Point in 28nm FDSOIMinhyeok Jeong, Hyungmin Gi, Minsik Cho, Mingyu Kim, Donggyu Kim, Sungyong Park, Woonjae Lee, Seonho Kim, Yeohoon Yoon, Shin Han, Donguk Seo, Jongmin Lee 0001, Yoonmyung Lee. 1-3 [doi]
• A Wireless Biopotential Sensing Node with Simultaneous Body-Channel Communication by TX-Coupled 21 Vpp Common-Mode Interference SuppressionYingJie Zhu, Ruizhi Liu, Yiqing Lan, Yilong Dong, Zhenyu Guo, Ruohan Wu, Yuxin Chen, Longyang Lin, Jerald Yoo, Jiamin Li. 1-3 [doi]
• A 28nm Value-Wise Hybrid-Domain Compute-in-Memory Macro with Heterogeneous Memory Fabric and Asynchronous Sparsity ManagerYuanzhe Zhao, Yang Wang 0089, Yuheng Wang, Heng Xie, Yan Zhu 0001, Rui Paulo Martins, Chi-Hang Chan, Shouyi Yin, Minglei Zhang. 1-3 [doi]
• A Power-Efficient Jitter-Insensitive 3.2GHz 1-bit CT ΔΣ ADC with Direct Charge Dump FeedbackYanquan Luo, Lu Jie, Nan Sun. 1-3 [doi]
• A 27-39GHz 48Gbit/s 8-Channel Phased Array Transceiver Frontend with Broadband TX/RX Co-Design OptimizationNiccolò Villaggi, Yuqi Liu, Tzu-Yuan Huang, Sensen Li, Taiyun Chi, Hua Wang 0006. 1-3 [doi]
• 2 SDR Receiver in 40-nm CMOS Covering 10-72GHz Using Inductor-Less Based LO QuintuplerHaoyu Bai, Ling Hao, Dong Wang, Keer Gao, Han Huang, Jiazheng Zhou, Jiaqi He, Junhua Liu, Huailin Liao. 1-3 [doi]
• An Ultra-Compact Wideband-Linearized Power Amplifier Achieving 0.24° AM-PM Distortion and Supporting 64-/256-/1024-/4096-QAMJingshang Dong, Pei Qin, Haoshen Zhu, Xiang Yi, Wenjie Feng 0002, Wenquan Che, Quan Xue. 1-3 [doi]
• A Calibration-free 80MHz CT DSM Using Dual Quantization and ISI Shuffler Achieving 106.2dB SFDRAhmed Abdelaal, John G. Kauffman, Joachim Becker, Matteo Dalla Longa, Francesco Conzatti, Maurits Ortmanns. 1-3 [doi]
• A 24.6-to-30.6GHz Magnetic-Isolated Sub-Sampling PLL with a Fast-Locking FLL Achieving 64.9fs Jitter, -253.3dB FoMJ, and -69.1dBc Reference Spur in 65nm CMOSHanzhang Cao, Chuqiao Wang, Yanwei Liu, Wen Wu, Tongde Huang, Xiaolong Liu. 1-3 [doi]
• An Energy and Area-Efficient PAM-4 Data Coding Scheme with Embedded Supply Noise Stabilization for Single-Ended Memory InterfaceGiyeong Heo, Younghwan Chang, Yong-Un Jeong, Jaekwang Yun, Jusung Lee, Shin-Hyun Jeong, Sanghyuk Seo, Suhwan Kim 0001. 1-3 [doi]
• A 50-kHz BW 92.1-dB SNDR Incremental ADC Using a Back-End Sampling Two-Step NS-SAR Architecture with Concurrent Gain-Error + Noise SuppressionTzu-Han Wang, Chenyang Li, Dong Suk Kang, Ken Li, Xitie Zhang, Wei-En Lee, Visvesh Sathe 0001, Shaolan Li. 1-3 [doi]
• Where is the Inductor: A Review and Comparison of the Hybrid DC-DC Buck TopologiesZhiguo Tong, Wenjie Yang, Shousheng Han, Junwei Huang, Xiangyu Mao, Yan Lu 0002. 1-8 [doi]
• A Compact Reconfigurable 24-29.5/38-43.5GHz Phased Array Transceiver Front-End with Self-Interference Rejection and Wideband IF Supporting TDD/FDD OperationQin Chen, Xuhao Jiang, Xuanxuan Yang, Yuchen Liang, Ziang Zhang, Junbo Liu, Yifei Hu, Depeng Cheng, Long He, Xu Wu, Lianming Li. 1-3 [doi]
• Integrated Photonic-electronic Deep Neural Networks: from Sub-nanosecond Image Classification to PVT-tolerant Activation FunctionsAmirreza Shoobi, Alexander J. Geers, Anish Mondal, Kaisarbek Omirzakhov, Farshid Ashtiani, Firooz Aflatouni. 1-6 [doi]
• A 28nm 3.14 TFLOP/W BF16 LLM Fine-Tuning Processor with Asymmetric Quantization Computing for AI PCXinyuan Lin, Leran Huang, Chenhan Wei, Wenbin Jia, Hedi Wang, Wenxun Wang, Hongyang Jia, Huazhong Yang, Yongpan Liu. 1-3 [doi]
• An SC-first Hybrid SCVR with 4xCF Continuously Scalable-Conversion Ratio SC Achieving 92.5% Peak EfficiencyYuanfei Wang, Zhiyuan Zhang, Ziyang Zhong, Yihan Zhang, Rui Paulo Martins, Mo Huang. 1-3 [doi]
• A 40nm 0.05-1.4uJ/inference Sample-Wise-Adaptive Spiking Neural Network Processor with Dynamic Neuron-Pruning and Unstructured-Model-Aware ArchitectureJinqiao Yang, Zikai Zhu, Longrun Xv, Anqin Xiao, Ziyi Yang, Lirong Zhenq, Zhuo Zou. 1-3 [doi]
• nd Harmonic Extraction Achieving 45.8fsrms Jitter and -254.3dB FoMYunbo Huang, Zunsong Yang, Hongyu Ren, Rui Paulo Martins, Yan Lu 0002, Nan Sun 0001, Nan Qi, Yong Chen 0005. 1-3 [doi]
• A 3ns Idle-Exit Latency 0.28-28Gb/s/pin Single-Ended NRZ Die-to-Die Interface with Energy-Efficient Receiver and Background Noise CompensationHyun Seok Choi, Sunki Cho, SangHee Lee, Hyeri Roh, Jeongeun Song, Honggyoo Ahn, Jihee Kim, Minchang Kim, Hankyu Chi, Deog Kyoon Jeong, Woo-seok Choi. 1-3 [doi]
• 2-Current-Density and 6.5µs RecoveryXiongjie Zhang, Xinman Li, Yang Jiang 0002, Zhangming Zhu, Rui Paulo Martins, Pui-In Mak. 1-3 [doi]
• D-Band Dicke Switch Based Passive Imager with 0.13K NETD in 28nm CMOS TechnologyZahra Mohseni, Sajjad Sabbaghi, Hai Yu, Peixin Han, Qun Jane Gu. 1-3 [doi]
• An Up-to-70-V Output Hybrid Boost Converter with Halved Voltage Stress Achieving 7-W Output Power and 73.8% Peak Efficiency at CR of 14Dingxuan Zhang, Tianrui Lyu, Jianping Guo. 1-3 [doi]
• Analog-AI Hardware Accelerators for Low-Latency Transformer-Based Language Models (Invited)Geoffrey W. Burr, H. Tsai, Irem Boybat, William Andrew Simon, Julian Büchel, Athanasios Vasilopoulos, P. Narayanan, Andrea Fasoli, Kohji Hosokawa, Manuel Le Gallo, M. Ishii, Yasuteru Kohda, Atsuya Okazaki, A. Chen, Charles Mackin, Elena Ferro, Kaoutar El Maghraoui, Hadjer Benmeziane, T. Philicelli, Corey Lammie, Alexander M. Friz, Jose Luquin, S. Jain, A. Sebastian, V. Narayanan. 1-6 [doi]
• Reducing the Impact of Non-Idealities on Incremental Δ∑ ADCs by Reconfiguration: A ReviewOmar Ismail, Paul Kaesser, Maurits Ortmanns. 1-8 [doi]
• A 224Gb/s 3pJ/bit 42dB Insertion Loss Post-FEC Error Free Transceiver in 3-nm FinFET CMOS (Invited)Dirk Pfaff, Muhammad Nummer, Noman Hai, Jingjing Xia 0001, Kai Ge Yang, Mohammad-Mahdi Mohsenpour, Choon-Haw CH Leong, Marc-Andre LaCroix, Babak Zamanlooy, Tom Eeckelaert, Dmitry Petrov, Mostafa Haroun, Carson R. Dick, Alif Zaman, HaiTao Mei, Tahseen Shakir, Carlos Carvalho, Howard Huang, Ralph Mason, Fahmida Brishty, Ifrah Jaffri, David A. Yokoyama-Martin. 1-8 [doi]
• RPG-HBC: Reconfigurable Passive Galvanic Human Body Communication for Bioelectronic Implants Under Varying Channel ConditionsYonghee Chang, Wei Wang, Yiwei Zou, Kaiyuan Yang 0001. 1-3 [doi]
• A Wearable Backscatter System Featuring Concurrent RF Harvesting and Bidirectional Communication with Commodity BLE TransceiversJi Xiong, Yongling Zhang, Junzai Chen, Xiaoyu Li, Jinrui ZuO, Yan Wang, Xiaoyi Wang, Miao Meng. 1-3 [doi]
• E-NPU: A 34~126nJ/Class Event-Driven Adaptive Neural SoC with Signal-Dynamics-Aware Feature Clustering and Multi-Model In-Memory Inference/Training for Personalized Medical WearablesFengshi Tian, Jinbo Chen, Kunming Shao, Zilu Liu, Jiakun Zheng, Hui Wu 0010, Chaoming Fang, Xiaomeng Wang, Ziyang Shen, Pingcheng Dong, Yuan Yao, Xuliang Wang, Jie Yang 0033, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting Cheng. 1-3 [doi]
• A 28nm 20.9-137.2 TOPS/W Output-Stationary SRAM Compute-in-Memory Macro Featuring Dynamic Look-ahead Zero Weight Skipping and Runtime Partial Sum QuantizationXiaofeng Hu, HanGyeol Mun, Jian Meng, Yuan Liao, Amitesh Sridharan, Jae-sun Seo. 1-3 [doi]
• A 748 GOPS/W RISC-V SoC with Reconfigurable Custom Instructions via a Synthesized eFPGA with 1.8µs Configuration Time in 22nm FinFETPrashanth Mohan, Siddharth Das, Ken Mai. 1-3 [doi]
• A Resistive Dynamic Bias Comparator with Flying Capacitors Achieving 129µVrms Input-Referred Noise at 1GS/s in 28nm FD-SOIByeongjin Son, Heungsik Eum, Hyeonjun Pi, Youngcheol Chae. 1-3 [doi]
• 2, 1.5GS/s and PVT-Tolerant 7-Bit Charge-Injection SAR ADC in 28nm CMOS Using a Background-Calibrated 1-Bit Metastability Detector and a gm-Boosted StrongARM ComparatorChaeeun Lee, Jongho Kim, Jintae Kim. 1-3 [doi]
• A 54μW Design-Agnostic Clock, Voltage, and EM-Pulse Fault-Injection Attack Detection Using Time-to-Voltage ConversionYudhajit Ray, Archisman Ghosh, Sarthak Antal, Shreyas Sen. 1-3 [doi]
• A 6.65-to-7.75GHz Fractional-N Digital PLL with Analog Pre-Distortion DTC Implementing 2nd/3rd-Order Calibration and Achieving -65.7dBc Fractional Spur and 154fs Integrated JitterDaxu Zhang, Dingxin Xu, Hongye Huang, Waleed Madany, Zezheng Liu, Wenqian Wang, Yuang Xiong, Ashbir Aviat Fadila, Duo Li, Yuncheng Zhang, Atsushi Shirane, Kenichi Okada 0001. 1-3 [doi]
• A Pseudo-4-Phase Buck Converter with 94.1 % Efficiency, 1mV Output Ripple and Fast Transient ResponseYu-Chen Kuo, Yu-Ting Huang, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai, Xi Zhu. 1-3 [doi]
• A 0.3-to-10.1 GHz 33.8fSRMS-Jitter Hybrid Injection-Locked Eight-Phase Clock Generator with Adaptive Mismatch Cancellation Technique for High-Speed Links in 28nm CMOSHongzhi Wu, Xuxu Cheng, Liping Zhong, Yangyi Zhang, Weitao Wu, Xiongshi Luo, Quan Pan 0002. 1-3 [doi]
• A Fully-Dynamic Capacitive Touch Sensor with Tri-Level Energy Recycling and Compressive Sensing Technique Achieving 1513 Hz Framerate and 10.66 pJ/Step Energy EfficiencyXiangdong Feng, Zhiyu Wang, Haoyang Li, Jiaqing Li, Guanglong Wu, Wei Wang, Weijin Lin, Xin Hu, Weixiao Wang, Zhong Tang, Yuyan Liu, Qinwen Fan, Hua Liu, Jianqiu Chen, Yuxuan Luo, Bo Zhao. 1-3 [doi]
• A 40nm 4Mb High-Reliability STT-MRAM Achieving 18ns Write-Time and 94.9% Wafer-Level-Die-Yield Across -55°C-to-125°CYaoru Hou, Haoran Du, Jiongzhe Su, Yibo Liu, Zhenghan Fang, Jia-Le Cui, Shuyu Wang, Chenxing Liu-Sun, Xuezhao Wu, Zhihua Xiao, Bo Liu 0019, Xin Si, Jun Yang 0006, Qiming Shao, Hao Cai 0001. 1-3 [doi]
• A Zero-Voltage-Switching Buck Converter with Conduction-Loss-Minimized ZVS Operation and Auxiliary Inductor Transient Reuse Technique Achieving up to 8.3% Efficiency Improvement and 42% Voltage Droop ReductionQingqing Min, Jingyi Yuan, Lin Cheng. 1-3 [doi]
• A 4.6-373K Functional 800MS/s 12b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated-Active-Hold TechniqueKaoru Yamashita, Kentaro Yoshioka, Christian Ziegler, Vadim Issakov, Hiroki Ishikuro. 1-3 [doi]
• An 18-Bit 183.9dB-FoMS, DR MES/Calibration-Free Scalable Zoom ADC Using Fully Passive Coarse Modulator and Gain-Linearity-Enhanced FIA with Sub-1ppm-THD at Full Scale Input in 65-nm CMOSYuke Shen, Shubin Liu, Deao Wu, Kui Wen, Yanbo Zhang, Yi Shen 0007, Zhangming Zhu. 1-3 [doi]
• Recording Front-End Electronics for Large-Scale Implantable Brain-Computer Interfaces: A Design PerspectiveXiaohua Huang, Dante G. Muratore. 1-8 [doi]
• A 5V-Input, 12.5-to-45V-Output Reconfigurable Hybrid Boost Converter with an SC-Based Parallel Auxiliary Cell Achieving 96.8% Peak EfficiencyGyeong-Gu Kang, Minjie Chen, Hyun-Sik Kim. 1-3 [doi]
• A 0.7-V 26.2-28.5 GHz Dual-Loop Double-Sampling PLL with Floating Capacitor OTA Based Gm-CP Achieving a 45.4-fsRMS JitterJun Chang, Hongzhi Liang, Yixiao Luo, Zeyu Peng, Zhe Li, Yi Shen 0007, Shubin Liu, Zhangming Zhu. 1-3 [doi]
• A CMOS 228-324GHz RF Domain Quadrature Receiver with a Broadband Harmonic-Enhanced LO GeneratorWeiping Wu, Xun Bao, Shi Chen, Jingze Wang, Shulan Chen, Yan Wang, Lei Zhang. 1-3 [doi]
• A 94.5%-Peak-Efficiency Dual-Path Single-Inductor Dual-Output Converter with Reduced Inductor Current and Output Voltage RippleBaochuang Wang, Lin Cheng 0001. 1-3 [doi]
• A 22nm Resource-Frugal Hyper-Heterogeneous Multi-Modal System-on-Chip Towards In-Orbit ComputingQuan Cheng, Qiufeng Li, Weirong Dong, Mingtao Zhang, Ruilin Zhang, Mingqiang Huang, Hao Yu 0001, Yiyu Shi 0001, Hiromitsu Awano, Takashi Sato 0001, Longyang Lin, Masanori Hashimoto. 1-3 [doi]
• A 16-bit Incremental ADC Enabled by An Efficient Shooting Integrator with Inherent Noise ReductionBo Wang 0012, Amine Bermak, Man Kay Law. 1-3 [doi]
• A 14-Cell Battery Monitoring AFE with 1mV Total Measurement Error and Integrated Electrochemical Impedance SpectroscopyXining Zhang, Yuxiang Tang, Yaohua Pan, Wenhui Qin, Jian Ye, Shaoyu Ma, Yun Sheng, Zhiliang Hong, Jiawei Xu 0001. 1-3 [doi]
• 2, 2 GS/s Resettable VCO-Based ADC With-out Quantization Noise ShapingTao Lu, Zixiang Liu, Hao Yang, Sai-Weng Sin, Robert Bogdan Staszewski, Fujiang Lin, Liheng Lou, Yizhe Hu. 1-4 [doi]
• Forward Error Correction Requirements for Data Center ConnectivityHan-Mo Ou, Gene Lee, Naresh Shanbhag. 1-3 [doi]
• A Fast-transient Buck Converter with One-Cycle-Balancing Control for Single and Consecutive Load StepsZihao Tang, Rui Paulo Martins, Mo Huang. 1-3 [doi]
• A 93.9% Peak Efficiency 3V-to-40V-Input GaN-based DC-DC Converter with Unified Reliability and Efficiency Adaptive ControlZhaoqing Wang, Yichen Xu, Suhwan Kim 0002, Nachiket V. Desai, Minxiang Gong, Ram Krishnamuthy, Xin Zhang 0025, Mingoo Seok. 1-3 [doi]
• 3 Miniaturized 5V/1A AC-DC Converter Using a Highly-Integrated Primary-Side Active Clamp Flyback Controller with Adaptive Frequency and Zero-Voltage SwitchingAkiyoshi Tanaka, Shan He, Reza Mounesi, Xinjian Liu, Omar Faruqe, Nugaira Gahan Mim, Daniel S. Truesdell, Adel Nasiri, Benton H. Calhoun. 1-3 [doi]
• A Tripolar Stimulator with Return-Electrode-Based Charge-Pack Injection Technique for Charge Imbalance Correction in Spatiotemporal StimulationJialei Wu, Simeng Yin, Yixin Zhou, Jianye Li, Kai Li, Xiaoyan Shen, Tinghui Sun, Xinlong Zhang, Keping Wang. 1-3 [doi]
• 3-Volume InductorHyunjun Park, Yunho Lee, Minsu Kim, Woojoong Jung, Hongseok Kim, Hyung-Min Lee. 1-3 [doi]
• A 6.87W 3.7-5V Input 12.6-24V Output Switched-Capacitor Sigma Converter with Multiple Voltage DomainsLingfeng Zhu, Chen Hu, Wing-Hung Ki, Xun Liu, Xiaosen Liu, Junmin Jiang. 1-3 [doi]
• A 28-GHz 189.2-dBc/Hz FoM 360° Phase-Shifting Quadrature Oscillator Without Phase Ambiguity Achieving 0.13° RMS Phase Error Under 2° Phase ResolutionHongkun Li, Yiyang Shu, Xun Luo. 1-3 [doi]
• A Multi-Level Power Management Architecture for Battery-Powered SPAD Drivers with Supply Intrinsic Quenching and 10-ns Dead TimeWenshuo Zhu, Xuan Sun, Xin Zhang, Cheng Huang. 1-3 [doi]
• A-117.1dB THD Audio Decoder Utilizing Single Vector Quantizer for Simultaneous Mismatch and ISI ShapingYuxiang Tang, Yijie Li, Kaiwen Zhou, Qi Luo, Xining Zhang, Yongda Ma, Zhiliang Hong, Jiawei Xu. 1-3 [doi]
• An 83.16-TOPS/W Voltage-Scalable Time-Domain CNN Accelerator with Full-Swing Delay Cell and Gray-Code TDC in 28-nm CMOSSangsu Jeong, Huiwon Yun, Dongkwon Lee, Sunwoo Lee 0005, Minyoung Kang, Dongsuk Jeon. 1-3 [doi]
• A 90.1dB SNDR, 180.2dB FoMSNDR, 10kHz BW Gm-C-based Δ Σ. ADC with Capacitive Input Feedforward and Duty-Cycled Gm TechniqueLinran Zhao, Yiming Han, Yaoyao Jia. 1-3 [doi]
• Pro-Cache-CIM: A 28nm 69.4TOPS/W Product-Cache-based Digital-Compute-in-Memory Macro Leveraging Data Locality Pattern in Vision AI TasksWenbin Jia, Yifan He, Xiang Li, Yixuan Xie, Zongle Huang, Wenxun Wang, Boju Chen, Yaolei Li, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu. 1-3 [doi]
• 3 Phase Noise Corner and 201dB FoMTBahram Jafari, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar. 1-3 [doi]
• CCE: A 28nm Content Creation Engine with Asymmetric Computing, Semantic-Driven Instruction Generation and Collision-Free Outlier Mapper for Video GenerationChen Tang, Zongle Huang, Wenxun Wang, Yifan He, Shupei Fan, Xiaoyu Feng, Wenyu Sun, Yongpan Liu. 1-3 [doi]
• A Fractional-N Cascaded PLL Employing the Calibration-Free Noise-and-Spur Cancellation TechniqueYongqi Hu, Jue Huang, Chenkang Ning, Yumeng Yuan, Hao Xu, Na Yan, Xufeng Kou. 1-3 [doi]
• A 22-to-32 GHz 4-Beam 32-Element Polarization Reconfigurable Fully-Connected Fully-Bidirectional MIMO Transceiver for Emerging Space-Air-Ground-Sea Integrated NetworkJunlong Gong, Wei Deng 0001, Shulin Yao, Haikun Jia, Xinyu Jiang, Xiangyu Nie, Dongfang Li, Hongliang Wu, Chuanming Zhu, Xiangrong Huang, Baoyong Chi. 1-3 [doi]
• A 6-18-GHz Reflectionless Blocker-Canceling Mixer-First Receiver with Maximum 55.6-dB Out-of-Band Rejection for Satellite Communication SystemsKai Li, Jialei Wu, Keping Wang. 1-3 [doi]
• An 81.7M Ω-lnput-lmpedance 179.5dB-FOMSNDR 1.8Vpp-lnput-Range Noise-Shaping-SAR-Based Sensing Frontend with Dynamic Input-Impedance Boosting and Prediction-Assisted Mismatch-Shaping-DEMYiming Han, Linran Zhao, Tzu-ping Huang, Alper Bozkurt, Yaoyao Jia. 1-3 [doi]
• Tracking Fmax Degradation of a RISC-V CPU with Synthesizable Odometer Aging SensorsTahmida Islam, Junkyu Kim, Hanzhao Yu, Chris H. Kim. 1-6 [doi]
• A PMOS-Based Deep Cryogenic CMOS Temperature Sensor Achieving a Range from 10K to 410K with a Relative Inaccuracy of 0.5% (3σ)Xingyu Qi, Yingzhe Sha, Xufeng Kou, Xiaoyong Xue, Peng Wang, Zhangcheng Huang 0001, Qi Liu 0010, Ming Liu 0022. 1-3 [doi]
• A 110µW 99.5dB-SNDR 20kHz-BW Intrinsically Linear CTDSM with Hybrid Gm-Boosting OTA and Tri-Level FIR DACsXinhang Xu, Yaohui Luan, Jie Li, Jihang Gao, Kwok Cheong Li, Jiajia Cui, Ru Huang 0001, Linxiao Shen. 1-3 [doi]
• A 16 GΩ Input Impedance Amplifier with Flicker Noise Reduction for Neural Recording ApplicationsJyotindra R. Shakya, Gabor C. Temes, Faraz Adin. 1-3 [doi]
• A 133.6-µW 1kHz-BW Multi-Bit 2nd-Order Incremental ADC Achieving 115.4-dB SNDR with Low-Cost Coarse-Sorting DEM and Zip-Extended-CountingYajie Zhao, Yongjie Ye, Shaokai Yuan, Yajie Qin. 1-3 [doi]
• Key, Value, Compress: A Systematic Exploration of KV Cache Compression TechniquesNeusha Javidnia, Bita Darvish Rouhani, Farinaz Koushanfar. 1-3 [doi]
• A Parallel-Input Energy-Recycling Power Management Unit with Continuous MPPT for Magnetoelectrically Powered mm-Scale Bio-ImplantsYiwei Zou, Huan-Cheng Liao, Wei Wang, Wonjune Kim, Yumin Su, Jacob T. Robinson, Kaiyuan Yang 0001. 1-3 [doi]
• 25-nA Modified Hybrid Ladder Converter with Efficient Output-Capacitor Charge Recycling and 90% Battery Lifetime ExtensionJianxin Yang, Rui Paulo Martins, Mo Huang. 1-3 [doi]
• A 95.9-dB SNDR 10-kHz BW 3rd-Order VCO-Based CT ΔΣ Modulator Using a Phase-Time Two-Step QuantizerKen Li, Wei-En Lee, Xitie Zhang, Tian Xie, Tzu-Han Wang, Visvesh Sathe 0001, Shaolan Li. 1-3 [doi]
• A LEGO-Like Easy-Stacking Step-Up SC Converter with Ultra-High and Wide VCR Using All Input-Stress-Only DevicesShousheng Han, Fei Song, Zhongyao Zhu, Xiaoming Wu, Hanjun Jiang, Tianling Ren, Yan Lu. 1-3 [doi]
• A 0.6V Supply Ultra-Compact Voltage Reference Exploiting MOS Threshold CorrelationsMatthias Eberlein, Sebastian Ruping. 1-3 [doi]
• A One-Shot Floating-Point Compute-in-Memory Macro Featuring PVT Robustness and Mismatch Tolerance for Edge LLMsYuanzhe Zhao, Heng Xie, Zijian Wang, Chunlin Tian, Li Li, Yan Zhu 0001, R. P. Martins, Chi-Hang Chan, Minglei Zhang. 1-3 [doi]
• Opal: A 16nm Coarse-Grained Reconfigurable Array for Full Sparse ML ApplicationsPo-Han Chen, Bo-Wun Cheng, Michael Oduoza, Zhouhua Xie, Kalhan Koul, Sai Gautham Ravipati, Yuchen Mei, Rupert Lu, Alex Carsello, Mark Horowitz, Priyanka Raina. 1-3 [doi]
• A 0.18-µs-Locking-Time Fractional-N PLL with Stochastic Gradient Descent Tuning Curve Fitting, Initial Phase Error Zeroing, and Random DSM Achieving 44.4-fs Jitter at Near-Integer ChannelHongzhuo Liu, Wei Deng 0001, Haikun Jia, Baoyong Chi. 1-3 [doi]
• A 0.055pJ/bit/dB 42Gb/s PAM-4 Wireline Transceiver with Consecutive Symbol to Center (CSC) Encoding and Classification for 26dB Loss in 16nm FinFETRamin Javadi, Tejasvi Anand. 1-3 [doi]
• A 12.5GS/s 14.7mW 4×TI Pipelined Hybrid TD-SAR ADC with Residual Time-Voltage AmplificationHaoyu Li, Boyang Wang, Hongjiang Chen, Sai-Weng Sin, Yutao Peng, Xizhu Peng, He Tang, Chao Fan, Liang Qi 0002, Rui Paulo Martins, Mingqiang Guo. 1-3 [doi]
• An Implantable Fully-Packaged Current-Controlled Wireless Near-Adiabatic Neural Stimulator Achieving 71.7% Peak Efficiency and 13.5% Efficiency Variation Across Supported Stimulation Current RangeHong Liao, Wentao Ma, Xiaoxu Yang, Jianfang Nie, Bingfang Wang, Zhiqiang Chang, Yin Fang, Miao Meng. 1-3 [doi]
• 2 Bias-Current-Free BLE Transceiver with 1-Bit Delay-Based Demodulation for Energy-Harvesting IoT applicationsLiqun Feng, Xuansheng Ji, Qianxian Liao, Longhao Kuang, Yunzhao Nie, Jiahao Zhao, Woogeun Rhee, Zhihua Wang 0001. 1-3 [doi]
• A Direct Digitizing, 1MHz Bandwidth, 28fA/√Hz Current Sensing Front-End Based on a Mixed-Signal Integrator-Differentiator TIA in 28nm CMOSDavid-Peter Wiens, Ahmed Abdelaal, Bjoern Driemeyer, Joachim Becker, John G. Kauffman, Maurits Ortmanns. 1-3 [doi]
• A 28-nm Real-Time Reinforcement Learning Processor for Mapless Autonomous Navigation with Unified Actor-Critic Network and Inference-on-Request SchedulingJuYoung Oh, Jie-Xin Liu, Yi-Chen Teng, Hsueh-Cheng Wang, Dongsuk Jeon. 1-3 [doi]
• Demonstration of Fast OTA Chirp-Based Beam Training Using Analog TTD Array with Millimeter Wave Testbed for Applications in Radar SystemsAditya Wadaskar, Hesam Abbasi, Sreeni Poolakkal, Yen-Chin Wang, Benjamin W. Domae, Subhanshu Gupta, Danijela Cabric. 1-8 [doi]
• A 209TOPS/W Reinforcement Learning Processor with Full Speculation Exploitation and Inference-Training Parallel ProcessingShih-Hao Chen, Ping-Sheng Wu, Brian Dean Soon, Chao-Hung Chen, Chun-Lung Hsu, Chih-Wei Liu, Chia-Hsiang Yang. 1-3 [doi]
• A 13b 2GS/s Time-Domain Pipelined ADC with Split-CDAC Ping-Pong Residue Transfer and PVT-Robust Self-Tracked Time AmplifierXin Zhao, Dengquan Li, Feida Wang, Depan Li, Yi Shen 0007, Hongzhi Liang, Zhangming Zhu. 1-3 [doi]
• A High Accuracy and Ultra-Low Energy Environmental Sound Recognition Processor with Progressive Spectrogram Processing and Adaptive Weight Clustering Based Online LearningLujie Peng, Xiben Jiao, Zhiyi Chen, Junyu Yang, Rui Hong, Longke Yan, Yu Long 0005, Xiao Chen, Xiaoyu Miao, Zheng Wang, Zhengning Wang, Liang Zhou, Liang Chang 0002, Shanshan Liu 0001, Tae-Hyoung Kim, Jun Zhou 0017. 1-3 [doi]
• A 100Gb/s Transmitter with Digital Pre-Distortion and MUX-Merged Voltage-Mode Driver Achieving 3-Times INLPP Improvement in 28nm CMOSChenxi Han, Xiaoteng Zhao, Qi Zhang, Yuan Liu, Yuhao Zhang, Hongzhi Liang, Yukui Yu, Shubin Liu, Zhangming Zhu. 1-3 [doi]
• A 0.14µJ Per-Acquisition Frequency Domain GPS Correlator Using Adaptive Compressive SamplingJung-Jin Park, Julian Arenas, Kevin Patino-Sosa, Visvesh S. Sathe 0001. 1-3 [doi]
• A Fully Integrated Adaptive-MPP-Shifting Rectifier for Piezoelectric Energy Harvesting Outputting 580µW at 10V-VOCXinling Yue, Wenyu Peng, Sijun Du. 1-3 [doi]
• An 800GbE PAM-4 PHY Transceiver that Supports 42dB Copper and Direct-Drive Optical Applications in 7nmChang Liu, Burak Çatli, Yong Liu, Anand Vasani, Guansheng Li, Kun Chua, Lakshmi P. Rao, Yang Liu, Xin Meng, Jiawen Zhang, Tim He, Batu Dayanik, Vadim Milirud, Meisam Honarvar Nazari, Hyo-Gyuem Rhew, Derui Kong, Arvindh Iyer, Nan Wang, Alireza Nilchi, Aminghasem Safarian, Ray Wang, Hyung Joon Jeon, Alex Yang, Boyu Hu, Xin Meng, Jerry Han, Adesh Garg, Kumar Thasari, Heng Zhang, Namik Kocaman, Ali Nazemi, Delong Cui, Afshin Momtaz, Jun Cao 0001. 1-3 [doi]
• A 37.5fs-rms Jitter and -254.1dB FoM Fractional-N Sampling PLL with Reference-Phase-Selection and Complementary-DTC Achieving 8× DTC Range Reduction and Zero DTC Delay OffsetYanchao Liu, Kaihang Wang, Yang Li, Yuchen Liu, Xiaohua Yu, Ronghua Ni. 1-3 [doi]
• An Energy-Efficient Healthcare Chest Patch Interface with Multi-Domain On-Sensor Computing and Inter-Sensor WindowingSanghyeon Cho, Jeonghoon Cho, Hyunjoong Kim, You Jang Pyeon, Dong Kwan Kang, Yonggi Kim, Eui-Sung Jung, Hoon Eui Jeong, Jae-Joon Kim. 1-3 [doi]
• A 1.8Gb/s 8GHz PSK-UWB Transceiver with Extended PPM/PWM Modulation and Embedded Carrier SpreadingLuhua Lin, Bowen Wang, Longhao Kuang, Woogeun Rhee, Zhihua Wang. 1-3 [doi]
• A 104-to-132 GHz 16-way Power Amplifier Using Enhanced Magnetic Coupling Cavity Achieving 21.2 dBm Output Power in 28nm Bulk CMOSZiyuan Guo, Wei Deng 0001, Weiqi Zheng, Haikun Jia, Hongliang Wu, Qiuyu Peng, Fuyuan Zhao, Junyang Yin, Dongze Li, Baoyong Chi. 1-3 [doi]
• A DAC-based Transmitter with VCSEL Bias-Current Generation enabling 180 Gbit/s PAM-8 Electrical and 100 Gbit/s PAM-4 VCSEL-based Transmission in 22nm SOIUrs Hecht, Philipp Scholz, Patrick Kurth, Frowin Buballa, Helia Ordouei, Friedel Gerfers. 1-3 [doi]
• A 106.1dB DR, 450μA Idle Current Class-H Piezoelectric MEMS MicroSpeaker Driver with Envelope Tracking, Digital and Analog Inputs and Less Than 2.1μs LatencyFrancesco Rezzi, V. Colonna, G. Gandolfi, Samuele Fusetto, M. Chiabrera, A. Savo, M. Costagliola, R. Stella, M. Bulzi, S. Radosav, D. Granozio, G. Alfieri, Alessandro Gemelli, Piero Malcovati, Edoardo Bonizzoni. 1-3 [doi]
• A Passive Crystal-Less Tag Demonstrating Battery-Free GSM-CW/5G-NR Downlink and BLE-to-BLE/BLE-to-WiFi/WiFi-to-WiFi Multi-Channel-Hopping Uplink with SmartphonesQijing Xiao, Changgui Yang, Yunshan Zhang, Ziyi Chang, Cheng Chen, Xin Hu, Weixiao Wang, Guangjie Gu, Yuxuan Luo, Bo Zhao 0003. 1-3 [doi]
• A 300-kHz 3-Level Flyback Converter Achieving 93% Peak Efficiency and 50% Reduction in Transformer SizeYuanzhuo Wu, Rui Paulo Martins, Mo Huang. 1-3 [doi]
• A 32GS/s 8b 16× Time-Interleaved Hybrid ADC with Self-Detection Offset Calibration, DLL-Based TLSB PVT Variation Calibration and VTC Gain Self-TrackingHongzhi Liang, Jun Chang, Yixiao Luo, Zeyu Peng, Weimin Zhou, Li Dang, Yue Cao, Haolin Han, Yi Shen 0007, Shubin Liu, Ruixue Ding, Zhangming Zhu. 1-3 [doi]
• A Reconfigurable 0.69-1.02nJ/Classification Biomedical AI Processor for Intelligent Health Monitoring DevicesYuanzhe Zhao, Yuheng Wang, Zijian Wang, Yan Zhu 0001, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang. 1-3 [doi]
• A 1V 9-86 fJ/Conv.Step 72.5dB-SNDR Level-Crossing Pipelined ADC with Triggered Sampling and Level FeedbackZexin Wang, Lingxin Meng, Menglian Zhao, Mengyu Li, Shuang Song 0003, Zhichao Tan. 1-3 [doi]
• A 0.7pArms Electrochemical Readout IC for Continuous Monitoring of Antibody Biologics in Upstream BiomanufacturingHung-Yu Hou, Ya-Chen Tsai, Wei Foo, Yan-Ting Hsiao, Jun-Chau Chien. 1-3 [doi]
• A Packaged D-Band Transmitter with a Multifeed Lens Antenna Achieving 25.3dBm Single-Element EIRP for 2-D Scalable ArraysHang Wang, Hao Guo, Xiaohan Zhang, Taiyun Chi. 1-3 [doi]
• A 4.82-µW 183.4dB-FoMSNDR CT Incremental Tracking-Zoom Sensor Readout Frontend with Floating-Gm-CCO IntegratorHaoyang Luo, Zongnan Wang, Jiarui Wang, Bingrui Li, Zilong Shen, Yang Liu, Xiaojie Duan, Yuan Wang 0001, Xiyuan Tang. 1-3 [doi]
• Aspen: A 630 FPS Real-Time Posit-Based Unified Accelerator for Extended Reality Perception WorkloadsKathleen Feng, Kartik Prabhu, Kai Bartolone, Jeffrey Yu, Priyanka Raina. 1-3 [doi]
• AJPEG: A 26.4-pJ/pixel, 252-fps, 128×128 Image Sensor with an In-Sensor Analog DCT Processor for Data CompressionRentao Wan, Yichen Xu, Dong-Woo Jee, Mingoo Seok. 1-3 [doi]
• 2 FoM, Three-Level Dual-Path Hybrid Buck Converter with Mitigated Capacitive Inrush Current and Seamless DVS Across a Wide 0.4-to-1.5V Output RangeJae-Hyun Kim, Jun-Gi Lee, Hyunki Han, Hyun-Sik Kim. 1-3 [doi]
• A 14.08 -Gb/s 256 -QAM 60 GHz Phased-Array Transceiver with Switchable Tertiary-Coil Transformer T/R Switch and Customizable-Sized Cascade Phase-Invariant VGAsXuwei Li, Depeng Cheng, Jing Feng, Xin Chen, Rui Cao, Lei Luo, Haipeng Duan, Dongming Wang 0002, Lianming Li. 1-3 [doi]
• 2 1.7Gbps Side-Channel Attack-Resistant Masked HMAC-SHA256 Accelerator in Intel 4 CMOSSachin Taneja, Vikram B. Suresh, Raghavan Kumar, Vivek De, Sanu Mathew. 1-3 [doi]
• A 12V/24V-to-1V Shared Switched-Capacitor Multi-Inductor Multi-Output Converter with 90.9%/89.5%Peak Efficiency and Negligible Cross RegulationYiling Xie, Jianping Guo. 1-3 [doi]
• st Generation Back Side Power Delivery Network for SoC and HPC Applications Beyond 2 nm NodeH. Fukutome, J. Kim, Joonghan Shin, J. Kim, Youngsoo Lee, S. Chae, B. Eom, Y. S. Nam, Minseong Lee, Sanghyun Ha, E. G. Chung, Sung-Hoon Lee, Sang Kim, K.-H. Cho, K. W. Lee, D.-W. Kim, H. J. Cho, K. Rim, J. Song. 1-6 [doi]
• A 52.03TOPS/W DCIM-Based Accelerator with FlashAttention and Sparsity-Aware Alignment for LLMsBo Liu 0019, Xingyu Xu 0008, Yang Zhang, Xilong Kang, Qingwen Wei, Zihan Zou, Jun Yang 0006, Hao Cai 0001, Xin Si. 1-3 [doi]
• A 0.49W 120.230VRMS to 8.12VDC Power Converter with Switched-Capacitor Regulation and Rectifier Short Flipping Achieving Maximized Bridge Conduction TimeTianqi Lu, Xianglong Li, Wenyu Peng, Sijun Du. 1-3 [doi]
• A 16nm 140-fJ/b/dB Dual-Mode ENRZ/NRZ Serial Data Transceiver with Dynamic Voltage ScalingArmin Tajalli, Cosimo Aprile, Milad Ataei, Rolf Beerwerth, Dario Carneli, Maik Fuhs, Kiarash Gharibdoust, Ali Hormati, James Hudner, Victor Perrin, Amin Shokrollahi, Richard Simpson 0004, Andrew Stewart, David Stauffer, Giuseppe Surace, Roger Ulrich, Patrick Urban, Mark Venneborger, Anant Singh. 1-3 [doi]
• A 30V Step-Up Regulator with Shunt-Current-Reuse Controller for >85% Efficiency over 200µA-100mA Loading RangeYue Zhao, Pengda Qu, Guangshu Zhao, Feng Luo, Yang Jiang 0002, Zhiming Xiao. 1-3 [doi]
• A 96.1% Efficiency 48V-to-IBV GaN Power Converter with Full-Wave Temperature-Compensated Current Sensing and Adaptive Slope Emulation Achieving 4.3% Full-Temperature Sensing Error for AI Data Center ApplicationsYike Fang, Jie Zou, Xugang Ke, Lenian He. 1-3 [doi]
• A 48x OSR 105.4-dB SNDR 24-kHz BW CT Zoom ADC with Reset Tri-level DWA and On-chip Negative-R CalibrationYuyu Lin, Yan Zhu 0001, Rui Paulo Martins, Chi-Hang Chan. 1-3 [doi]
• A High-Performance Passive Base System for Distributed AI/Media AccelerationRagh Kuttappa, Jainaveen Sundaram, Srivatsa Rangachar Srinivasa, Paolo A. Aseron, Gauthaman Murali, Vinayak Honkote, Prerna Budhkar, Dileep Kurian, Ronald Kalim, Thomas P. Thomas, Anuradha Srinivasan, Tanay Karnik. 1-6 [doi]
• A Fully-Integrated Wireless Ingestible Drug Delivery Chip with Electrochemical Energy Harvesting and pH-Based MPPTSo-Yoon Yang, Deniz Umut Yildirim, Saransh Sharma, Donghyeon Han, Rishabh Mittal, Husna Ellis, Jaehong Jung, Eunseok Lee 0002, Yubin Cai, Giovanni Traverso, Anantha P. Chandrakasan. 1-3 [doi]
• In-Ear EEG Auditory Neurofeedback Towards Unobtrusive Sleep EnhancementMin Suk Lee 0002, Zhaoyi Liu, Abhinav Uppal, Jiahao Song, Akshay Paul, Florian Chapotot, Esra Tasali, Yuchen Xu 0002, Gert Cauwenberghs. 1-7 [doi]
• rd-order Multi-Input Filter and a PVT-Robust Ratio-Based FIAGabriele Zanoletti, Gabriele Bè, Michele Rocco, Luca Ricci, Alessia Ceroni, Salvatore Levantino, Andrea Leonardo Lacaita, Luca Bertulessi, Andrea Bonfanti, Carlo Samori. 1-3 [doi]
• A 40.68MHz Dual-Output Wireless Power Transfer System Achieving 149.7mW Maximum Power and 90.3%/51.2% RX/E2E Efficiency with 8mm-Diameter RX CoilTianqi Lu, Sijun Du. 1-3 [doi]
• A 68 TOPS/W, 256MB SRAM Sparse GEMM Accelerator Tiled Across 16, 4nm Near Memory Compute (NMC) Chiplets Disaggregated 2.5D SystemSrivatsa Rangachar Srinivasa, Prerna Budhkar, Gauthaman Murali, Vui Seng Chua, Paolo A. Aseron, Vinayak Honkote, Ravi R. Iyer 0001, Nilesh Jain, Dileep John Kurian, Anuradha Srinivasan, Tanay Karnik. 1-3 [doi]
• High-Entropy Analog-Based Strong PUF Reaching 166 F2/Bit Area-to-Entropy-RatioAlessandro Catania, Sebastiano Strangio, Maksym Paliy, Christian Sbrana, Michele Bertozzi, Giuseppe Iannaccone. 1-3 [doi]
• ISPI: A 2-Wire Improved Serial Peripheral Interface with Automatic Routing Algorithm for 2-D In-Textile Distributed Computing and Storage SystemsZhenghong Chen, Braden E. Desman, Anjali Agrawal, Will Farrell, Jim Owens, Daniel S. Truesdell, Benton H. Calhoun. 1-3 [doi]
• 3D-IC Chiplet Integrated Power Supply with LDO, SCVR, and Buck DC-DC ConverterXiaosen Liu, Xichen Sun, Haozhe Zhang, Yan Wang 0023. 1-8 [doi]
• A CMOS Low-Noise Fast-Settling BM-TIA with CM-Post-Amplifier Chip Connectivity for 50G-PONYifei Xia, Zhixing Zhang, Shuaizhe Ma, Yuanhao Yao, Ruixuan Yang, Yuye Yang, Jianyu Yang, Li Geng, Dan Li. 1-3 [doi]
• A 30-110V Resonant Buck-Boost Power-Bus Charger Achieving 50-A Peak Laser-Current Pulse Generation in 2ns for MHz-Frequency Automotive LiDAR TransmitterHangxiao Ma, Qiaobo Ma, Xuchu Mu, Yang Jiang 0002, Rui Paulo Martins, Pui-In Mak. 1-3 [doi]
• TD-dAJC: A 2pJ/Pixel Time-Domain Weight and Integrating-MAC Based Direct-Analog-to-MJPEG Compression for Video Sensor NodesGourab Barik, Harshit Naman, Yudhajit Ray, Shreyas Sen. 1-3 [doi]
• A 32-Channel 85.4dB SNDR Time-multiplexed Neural Recording Frontend Achieving Within-Conversion Artifact RecoveryArindam Mandal, Chi-Hsiang Huang 0001, Julian Arenas, Wei-En Lee, Philip Anschutz, Amanda L. Jacob, Keshav Ramachandra, Samuel J. Sober, Muhannad S. Bakir, Shaolan Li, Visvesh S. Sathe 0001. 1-3 [doi]
• A Scalable 256-Channel 12-mA 0.06%-Current-Mismatch 22-V Neurostimulator with Real-Time Current Calibration and Compliance MonitoringPo-Han Chen, Zhiheng Luo, Spencer Chang, Kristopher Ngo, Ritwik Vatsyayan, Jihwan Lee, Tara Porter, Drew A. Hall, Shadi A. Dayeh, Ian Galton, Hanh-Phuc Le. 1-3 [doi]
• A 22.0-to-28.4GHz 192.2dBc/Hz FoM and 206.2dBc/Hz FoMA Dual-Core VCO Using Circular-Inverse-Class-F Topology Under Standard Supply Voltage in 65nm CMOS ProcessHuanyu Ge, Haikun Jia, Wei Deng 0001, Baoyong Chi. 1-3 [doi]
• A Reconfigurable Potts Machine with Successive Boundary Approximation Annealing for Solving Combinatorial Optimization ProblemsYifeng Zhou, Xin Hao, Qinchao Cai, Lei Liao, Zhuojun Chen. 1-3 [doi]
• BASS-PLL: A Bandwidth Augmented Sub-Sampling PLL Achieving a Wide Bandwidth Above 30% of the Reference Frequency and a Worst Case FoMREF of -247.9dB at 3GHz with a Ring OscillatorXueke Cai, Tong Zhang, Weihao Jie, Yanling Zheng, Deyong Li, Yiwen Zhang, Yang Zhao, Yongfu Li, Honglan Jiang, Patrick P. Mercier, Hui Wang 0023. 1-3 [doi]
• On-Chip Circuit Harness Enabling Probe-Less, Position-Invariant and Massive Testing of Chiplets via Die Front/Back-Side Capacitive CouplingNeelkamal Semwal, Luigi Fassio, Massimo Alioto. 1-3 [doi]
• 2450MHz-BW 72dB-SNDR Continuous-time Pipeline ADC with APF+HPF and APF+FIR Hybrid Delay Alignment TechniquesHeyang Zhao, Yuxuan He, Yunsong Tao, Zhishuai Zhang, Yong Chen 0005, Yi Zhong, Lu Jie 0001, Nan Sun 0001. 1-3 [doi]
• 2 Electrochemical Frontend, Achieving 170dB Current Sensing Range with Extended Compliance Voltage Adopting Feedforward CancellationA. Sukumaran, F. Caruso, Régis Cattenoz, B. Putter, Jean-Luc Nagel, R. Ravanilla, I. Stergiou, G. Bouilly, P. Nussbaum, Stéphane Emery. 1-3 [doi]
• UCle-Compliant Chiplet Interconnect Design Leveraging Cutting-Edge Packaging TechnologiesYu-Jie Huang, Mu-Shan Lin, Chien-Chun Tsai, Wei-Chih Chen, Hsin-Hung Kuo, Shu-Chun Yang, Shenggao Li. 1-8 [doi]
• A 6µW ECG-Recording ΔΣ Modulator with Internal-Capacitor-Flipping Technique for 34Vpp Common-Mode-Interference (CMI) Tolerance and 1Vpp Input RangeJimin Koo, Sein Oh, Yoontae Jung, Vincent Lukito, Sohmyung Ha, Minkyu Je. 1-3 [doi]
• 16 Arrays of 32 All-to-All Coupled CMOS Oscillators for AI Inference and Combinatorial OptimizationHai Li 0008, James S. Ayers, Anni Lu, You Li, Dmitri E. Nikonov, Yongping Fan, Ian A. Young. 1-3 [doi]
• Continuous-Time Delta-Sigma Modulator with SAR-Assisted Digital Noise CouplingKent Edrian Lozada, Il-Hoon Jang, Ye-Dam Kim, Seung-Tak Ryu. 1-8 [doi]