Abstract is missing.
- An analysis-based approach to composition of distributed embedded systemsPai H. Chou, Gaetano Borriello. 3-7 [doi]
- Combining multiple models of computation for scheduling and allocationDirk Ziegenbein, Rolf Ernst, Kai Richter, Jürgen Teich, Lothar Thiele. 9-13 [doi]
- Modeling reactive systems in JavaClaudio Passerone, Roberto Passerone, Claudio Sansoè, Jonathan Martin, Alberto L. Sangiovanni-Vincentelli, Rick McGeer. 15-19 [doi]
- Energy-conscious HW/SW-partitioning of embedded systems: a case study on an MPEG-2 encoderJörg Henkel, Yanbing Li. 23-27 [doi]
- HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systemsThomas Hollstein, Jürgen Becker, Andreas Kirschbaum, Manfred Glesner. 29-33 [doi]
- Towards interprocess communication and interface synthesis for a heterogeneous real-time rapid prototyping environmentFranz Fischer, Annette Muth, Georg Färber. 35-39 [doi]
- Domain-specific interface generation from dataflow specificationsMichael Eisenring, Jürgen Teich. 43-47 [doi]
- Communication synthesis and HW/SW integration for embedded system designGuy Gogniat, Michel Auguin, Luc Bianco, Alain Pegatoquet. 49-53 [doi]
- Communication estimation for hardware/software codesignPeter Voigt Knudsen, Jan Madsen. 55-59 [doi]
- Software timing analysis using HW/SW cosimulation and instruction set simulatorJie Liu, Marcello Lajolo, Alberto L. Sangiovanni-Vincentelli. 65-69 [doi]
- Optimistic distributed timed cosimulation based on thread simulation modelSungjoo Yoo, Kiyoung Choi. 71-75 [doi]
- Fast dynamic analysis of complex HW/SW-systems based on abstract state machine modelsGiuseppe Del Castillo, Wolfram Hardt. 77-81 [doi]
- A path analysis based partitioning for time constrained embedded systemsLuc Bianco, Michel Auguin, Guy Gogniat, Alain Pegatoquet. 85-89 [doi]
- Schedulability analysis of heterogeneous systems for performance message sequence chartFrank Slomka, Jürgen Zant, Lennard Lambert. 91-95 [doi]
- TGFF: task graphs for freeRobert P. Dick, David L. Rhodes, Wayne Wolf. 97-101 [doi]
- A hardware/software prototyping environment for dynamically reconfigurable embedded systemsJosef Fleischmann, Klaus Buchenrieder, Rainer Kress. 105-109 [doi]
- Hardware/software co-design of an ATM network interface card: a case studyJean-Marc Daveau, Gilberto Fernandes Marchioro, Ahmed Amine Jerraya. 111-115 [doi]
- A case study on modeling shared memory access effects during performance analysis of HW/SW systemsMarcello Lajolo, Anand Raghunathan, Sujit Dey, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli. 117-121 [doi]
- The construction of a retargetable simulator for an architecture templateBart Kienhuis, Ed F. Deprettere, Kees A. Vissers, Pieter van der Wolf. 125-129 [doi]
- HDL code restructuring using timed decision tablesJian Li, Rajesh K. Gupta. 131-135 [doi]
- RECOD: a retiming heuristic to optimize resource and memory utilization in HW/SW codesignsKaram S. Chatha, Ranga Vemuri. 139-143 [doi]
- Memory size estimation for multimedia applicationsPeter Grun, Florin Balasa, Nikil D. Dutt. 145-149 [doi]