Abstract is missing.
- Single Event Transient injection in large mixed-signal circuitsValentin Gutierrez, Gildas Léger. 1-6 [doi]
- Low noise, high efficiency, segmented LCD drivers for ultra-low power applications in 22 nm FD-SOIRodrigo B. Capeleiro, Marcelino B. Santos. 1-6 [doi]
- Security-oriented Code-based Architectures for Mitigating Fault AttacksBatya Karp, Mael Gay, Osnat Keren, Ilia Polian. 1-6 [doi]
- SoC Architecture for an Ultrasonic Receiver applied to Local Positioning SystemsÁlvaro Hernández, Jesús Ureña, Jose M. Villadangos, Khaoula Mannay. 1-5 [doi]
- Low Phase-Noise CMOS Quadrature Oscillator based on (N × 4)-stage Self-Timed RingOussama Elissati, Assia El-Hadbi, Abdelkarim Cherkaoui, Sébastien Rieubon, Laurent Fesquet. 1-5 [doi]
- Quantum dot location relevance into SET-FET circuits based on FinFET devicesE. Amat, A. del Moral, Joan R. Bausells, Francesc Pérez-Murano, F. Klupfel. 1-5 [doi]
- Optimal Accelerated Test Regions for Time- Dependent Dielectric Breakdown Lifetime Parameters Estimation in FinFET TechnologyKexin Yang, Rui Zhang, Taizhi Liu, Dae-Hyun Kim, Linda Milor. 1-6 [doi]
- From RTL Liveness Assertions to Cost-Effective Hardware CheckersRanganathan Hariharan, Tara Ghasempouri, Behrad Niazmand, Jaan Raik. 1-6 [doi]
- Systematic Design Method of Passive Ladder Filters using a Generalised VariableArthur Perodou, Anton Komiienko, Gérard Scorletti, Ian O'Connor. 1-6 [doi]
- CMOS VCSEL driver dedicated for sub-nanosecond laser pulses generation in SPAD-based time-of-flight rangefinderS. Rigault, N. Moeneclaey, Lioula Labrak, Ian O'Connor. 1-6 [doi]
- Design for Calibratability of a N-Integer Low-Frequency Phase-Locked LoopRui Moutinho Teixeira, José Machado da Silva. 1-6 [doi]
- MRAM: from STT to SOT, for security and memoryM. Kharbouche-Harrari, Rana Alhalabi, Jérémy Postel-Pellerin, Romain Wacquez, D. Aboulkassimi, Etienne Nowak, Ioan Lucian Prejbeanu, Guillaume Prenat, Gregory di Pendina. 1-6 [doi]
- Investigation of Conductivity Changes in Memristors under Massive Pulsed CharacterizationM. Pedro, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Xavier Aymerich. 1-4 [doi]
- System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SASMikel Rodriguez, Armando Astarloa, Jesús Lázaro 0001, Unai Bidarte, Jaime Jimenez. 1-6 [doi]
- Event Storms in IEC 61499 ApplicationsDavid Pescha, Martin Horauer. 1-5 [doi]
- A CMOS Low Frequency Analog RFID Front-End for the IoTX. Zuriarrain, Andoni Beriain, Guillermo Bistué, David del Rio, Roc Berenguer, Héctor Solar, Javier Sosa, Juan A. Montiel-Nelson. 1-6 [doi]
- Embedded System for Distance Measurement and Surface Discrimination ApplicationsHelene Tap, Laurent Gatet, Emmanuel Moutaye, Blaise Mulliez. 1-6 [doi]
- Energy-Aware Adaptative Supercapacitor Storage System for Multi-Harvesting SolutionsAlbert Alvarez-Carulla, Yaiza Montes-Cebrian, Manel Puig-Vidal, Jaime López-Sánchez, Jordi Colomer-Farrarons, Pere Lluís Miribel-Català. 1-6 [doi]
- Reliability Analysis of On-Chip Wireless Links for Many Core WNoCsSri Harsha Gade, Sidhartha Sankar Rout, Ravi Kashyap, Sujay Deb. 1-6 [doi]
- Run-Time management of energy-performance trade-off in Optical Network-on-ChipJiating Luo, Van-Dung Pham, Cedric Killian, Daniel Chillet, Ian O'Connor, Olivier Sentieys, Sébastien Le Beux. 1-6 [doi]
- Breakdown Voltage Shift of CMOS Buried Quad Junction (BQJ) DetectorThais Luana Vidal de Negreiros da Silva, Guo-Neng Lu, Patrick Pittet. 1-6 [doi]
- Finite Precision Analysis of FPGA-based Architecture for FBMC Transmultiplexers in Broadband PLCRubén Nieto, Raúl Mateos, Álvaro Hernández. 1-6 [doi]
- Benchmarking of nanometer technologies for DPA-resilient DPL-based cryptocircuitsErica Tena-Sánchez, I. M. Delgado-Lozano, Juan Núñez, Antonio J. Acosta. 1-6 [doi]
- Performance-oriented Implementation of Hilbert Filters on FPGAsDaniel Fortun, Carlos Garcia de la Cueva, Jesús Grajal, Marisa López-Vallejo, Carlos A. López-Barrio. 1-6 [doi]
- Vector-Based Mismatch Shaping circuit for a low IF Multibit Σ∆ ADCM. Portela-Garcia, V. M. Medina, S. Paton. 1-6 [doi]
- Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipherF. E. Potestad-Ordonez, C. J. Jiménez-Fernández, C. Baena-Oliva, P. Parra-Fernandez, M. Valencia-Barrero. 1-6 [doi]
- Design of a Fully Integrated CMOS-PMUT SystemI. Zamora, E. Ledesma, Arantxa Uranga, Núria Barniol. 1-5 [doi]
- Time-To-Digital Converter with adjustable resolution using a digital Vernier Ring OscillatorA. Annagrebah, E. Bechetoille, H. Chanal, H. Mathez, I. Laktineh. 1-4 [doi]
- Embedded Emotion Recognition within Cyber-Physical Systems using Physiological SignalsJose Angel Miranda Calero, Rodrigo Marino, José Manuel Lanza-Gutiérrez, Teresa Riesgo, Mario García-Valderas, Celia López-Ongil. 1-6 [doi]
- Assessing Test Procedure Effectiveness for Power DevicesDavide Piumatti, Matteo Sonza Reorda. 1-6 [doi]
- Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low PowerHao Cai, Menglin Han, You Wang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao. 1-5 [doi]
- An integrated 10MHz 3 States Buck converter for fast transient response in 180nm CMOSArnaud Toni, Hassan Ihs, Taner Dosluoglu, Remy Cellier, Nacer Abouchi. 1-4 [doi]
- Improvement of Active-Input Current Mirrors Using Adaptive Biasing TechniqueMohan Julien, Serge Bernard, Fabien Soulier, Vincent Kerzerho, Guy Cathébras. 1-4 [doi]
- Efficient Simulation of Faults in Networked Cyber-Physical SystemsEnrico Fraccaroli, Davide Quaglia, Franco Fummi. 1-6 [doi]
- A Fuel Cell-based adaptable Self-Powered Event Detection platform enhanced for biosampling applicationsYaiza Montes-Cebrian, Albert Alvarez-Carulla, Jordi Colomer-Farrarons, Manel Puig-Vidal, Jaime López-Sánchez, Pere Lluís Miribel-Català. 1-6 [doi]
- Approximate Wireless Networks-on-ChipGiuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose. 1-6 [doi]
- RRAM Crossbar Arrays for Storage Class Memory Applications: Throughput and Density ConsiderationsA. Levisse, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean Michel Portal. 1-6 [doi]
- Multioctave Distributed MMIC Power Amplifier in Gallium Nitride Technology with P1dB > 31dBmIban Barrutia, Amparo Herrera, Benoit Haentjens, Laura Diego, Charles A. Mjema. 1-6 [doi]
- ARFT: An Approximative Redundant Technique for Fault ToleranceGennaro Severino Rodrigues, Ádria Barros de Oliveira, Alberto Bosio, Fernanda Lima Kastensmidt, Edison Pignaton de Freitas. 1-6 [doi]
- Estimation of the Optimal Accelerated Test Region for FinFET SRAMs Degraded by Front-End and Back-End Wearout MechanismsRui Zhang, Kexin Yang, Taizhi Liu, Linda Milor. 1-6 [doi]
- Low-power frequency monitoring circuit for clock failure detectionRodrigo B. Capeleiro, José M. Leitão, Ricardo Chaves, Marcelino B. Santos. 1-6 [doi]
- Data Conversion in Area-Constrained Applications: the Wireless Network-on-Chip CaseSergi Abadal, Eduard Alarcón. 1-6 [doi]
- Exploring the Performance-Energy Optimization Space of a Bridge Between 3D-Stacked Electronic and Optical Networks-on-ChipMahdi Tala, Oliver Schrape, Milos Krstic, Davide Bertozzi. 1-6 [doi]