Table of Contents

• Hybrid BIST Optimization for Core-based Systems with Test Pattern BroadcastingRaimund Ubar, Maksim Jenihhin. 3-8 [doi]
• Testability Issues in Superconductor ElectronicHans G. Kerkhoff, Arun A. Joseph. 9-14 [doi]
• Frequency Domain Testing of General Purpose Processors at the Instruction Execution LevelN. Venkateswaran, Krishna Bharath. 15-22 [doi]
• Spectral Warping RevisitedDonald Bailey, Warwick Allen, Serge N. Demidenko. 23-28 [doi]
• A New Method for Eye Extraction from Facial ImageXiaoyun Deng, Chip-Hong Chang, Erwin Brandle. 29-34 [doi]
• A New read-out circuit for low power current and voltage mediated integrating CMOS imagerAmine Bermak, Farid Boussaïd, Abdesselam Bouzerdoum. 35-40 [doi]
• Phase Correlations in Human EEG Signal: A Case StudyGagandeep S. Sandha, Pawan K. Singh, Neha Oberoi, D. Nagchoudhuri. 41-46 [doi]
• Testing and Analysis of Computer Generated Holograms for MicroPhotonic DevicesSelam T. Ahderom, Mehrdad Raisi, Kamal E. Alameh, Kamran Eshraghian. 47-52 [doi]
• Pixel Structure Effects on Crosstalk in Backwall Illuminated CMOS Compatible Photodiode ArraysSteven Hinckley, Paul V. Jansz-Drávetzky, Kamran Eshraghian. 53-58 [doi]
• Dynamic MicroPhotonic WDM EqualizerMehrdad Raisi, Selam T. Ahderom, Kamal E. Alameh, Kamran Eshraghian. 59-62 [doi]
• MicroPhotonic Reconfigurable RF Signal ProcessorKamal E. Alameh, Selam T. Ahderom, Mehrdad Raisi, Rong Zheng, Kamran Eshraghian. 63-70 [doi]
• Towards a Modular Communication System for FPGAsNatascha Petry Ligocki, Achim Rettberg, Mauro Cesar Zanella, Andreas Hennig, André Luiz de Freitas Francisco. 71-76 [doi]
• Xilinx Virtex II Pro Implementation of a Reconfigurable UMTS Digital Channel FilterJ. Chandran, R. Kaluri, Jugdutt Singh, Viktor Öwall, Ronny Veljanovski. 77-82 [doi]
• High Quality TPG for Delay Faults in Look-Up Tables of FPGAsPatrick Girard, Olivier Héron, Serge Pravossoudovitch, Michel Renovell. 83-88 [doi]
• FPGA Implementation of an OFDM-WLAN SynchronizerK. Wang, Jugdutt Singh, M. Faulkner. 89-96 [doi]
• Towards Analog and Mixed-Signal SOC Design with SystemC-AMSAlain Vachoux, Christoph Grimm, Karsten Einwich. 97-102 [doi]
• CMOS ADC with Reconfigurable Properties for a Cellular HandsetAleksandar Stojcevski, Jugdutt Singh, Aladin Zayegh. 103-107 [doi]
• Time Domain Analogue to Digital Conversion in a Digital Pixel Sensor ArrayAlistair Kitchen, Abdesselam Bouzerdoum, Amine Bermak. 108-114 [doi]
• Static Scheduling of Monoprocessor Real-Time Systems composed of Hard and Soft TasksLuis Alejandro Cortés, Petru Eles, Zebo Peng. 115-120 [doi]
• The Slack Sharing Server for Embedded MicrocontrollersYao Li. 121-125 [doi]
• A Novel Approach to Real-time Bilinear InterpolationK. T. Gribbon, Donald G. Bailey. 126-134 [doi]
• Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in EuropMarie-Lise Flottes, Yves Bertrand, L. Balado, E. Lupon, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, N. Pricopi, Hans-Joachim Wunderlich. 135-139 [doi]
• Engaging Undergraduate Students with Robotic Design ProjectsJames O. Hamblen, Tyson S. Hall. 140-145 [doi]
• A Case Study of a Microsystems MSc CurriculumTon J. Mouthaan. 146-148 [doi]
• Infrastructures for Education, Research and Industry in Microelectronics - A reviewBernard Courtois. 149-156 [doi]
• A Feasibility Study Of UML In The Software Defined RadioXiaoyong Yang. 157-162 [doi]
• BioMedical Intelligence Security Home Network- ATM/IP CATV NetworkRudolf Volner, Lubomir Pousek. 163-168 [doi]
• Dynamic Channel Order Estimation AlgorithmPeter J. Green, Desmond P. Taylor. 169-173 [doi]
• An Enhanced SOFM Method for Automatic Recognition and Identification of Digital ModulationsXiaoyong Yang. 174-182 [doi]
• CMOS Open Fault Detection by Appearance Time of Switching Supply CurrentMasaki Hashizume, Tetsuo Akita, Hiroyuki Yotsuyanagi, Takeomi Tamesada. 183-188 [doi]
• Practical Fault Coverage of Supply Current Tests for Bipolar ICsIsao Tsukimoto, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada. 189-194 [doi]
• Measurement and Analysis of Physical Defects for Dynamic Supply Current TestingScott Thomas, Rafic Z. Makki, Sai Kishore Vavilala. 195-202 [doi]
• Reconfigurable MicroPhotonic Add/Drop Multiplexer ArchitectureSelam T. Ahderom, Mehrdad Raisi, Kamal E. Alameh, Kamran Eshraghian. 203-207 [doi]
• Integrated MicroPhotonic Broadband Smart Antenna BeamformerKamal E. Alameh, Kamran Eshraghian, Selam T. Ahderom, Mehrdad Raisi, Mike Myung-Ok Lee, Rainer Michalzik. 208-212 [doi]
• Novel Integrated Optical Router for MicroPhotonic SwitchingZhenglin Wang, Kamal E. Alameh, Selam T. Ahderom, Rong Zheng, Mehrdad Raisi, Kamran Eshraghian. 213-218 [doi]
• Arithmetic Transformations to Maximise the Use of Compressor TreesPaolo Ienne, Ajay K. Verma. 219-224 [doi]
• Microsystem Development Using the TQM Design MethodologyAndrzej Rucinski, Artur Skrygulec, Khrystyna Pysareva, Jakub Mocny. 225-230 [doi]
• System-level metrics for hardware/software architectural mappingFabrizio Ferrandi, Pier Luca Lanzi, Donatella Sciuto, Mara Tanelli. 231-236 [doi]
• Coverage Measurement for Software Application Level Verification using Symbolic Trajectory Evaluation TechniquesAdriel Cheng, Atanas N. Parashkevov, Cheng-Chew Lim. 237-244 [doi]
• Invariants for Distributed Local Control Elements of a New Synchronous Bit-Serial ArchitectureFlorian Dittmann, Achim Rettberg, Thomas Lehmann, Mauro Cesar Zanella. 245-250 [doi]
• SOC-B Design and Testing Technique of IS-95C CDMA Transmitter for Measurement of Electric Field Intensity using FPGA and ASICChul Kim, Mike Myung-Ok Lee, Byung-Lok Cho, Kamran Eshraghian. 251-254 [doi]
• Local Search Method for FIR Filter Coefficients SynthesisZhi Ye, Chip-Hong Chang. 255-260 [doi]
• Optimization of Multipartite Table Methods to Approximate the Elementary FunctionsHuaping Liu, Han Chengde. 261-268 [doi]
• On Configuring Scan Trees to Reduce Scan Shifts based on a Circuit StructureHiroyuki Yotsuyanagi, Toshimasa Kuchii, Shigeki Nishikawa, Masaki Hashizume, Kozo Kinoshita. 269-274 [doi]
• On Using Test Vector Differences for Reducing Test Pin NumbersMarie-Lise Flottes, Regis Poirier, Bruno Rouzeyre. 275-280 [doi]
• Scan Test of IP Cores in an ATE EnvironmentLuca Schiano, Yong-Bin Kim, Fabrizio Lombardi. 281-286 [doi]
• Design of Routing-Constrained Low Power Scan ChainsYannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel. 287-294 [doi]
• The Application of Nonstandard Support Vector Machine in Tool Condition Monitoring SystemJ. Sun, G. S. Hong, Mustafizur Rahman 0002, Yoke San Wong. 295-300 [doi]
• Artificial Controlled Neural Network Emulator for Quasi Resonant ConverterU. Sabura Banu, G. Uma, M. A. Panneerselvam. 301-305 [doi]
• A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic CircuitsDaisuke Ezaki, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada. 306-311 [doi]
• Design of CMOS IO Drivers with Less Sensitivity to Process, Voltage, and Temperature VariationsGerald Esch Jr., Tom Chen. 312-320 [doi]
• Determining error rate in error tolerant VLSI chipsMelvin A. Breuer. 321-326 [doi]
• Built-in Fault Injection in Hardware - The FIDYCO ExampleBabak Rahbaran, Andreas Steininger, Thomas Handl. 327-332 [doi]
• Crosstalk Fault Tolerant Processor Architecture - A Power Aware DesignN. Venkateswaran, V. Barath Kumar, R. Raghavan, R. Srinivas, S. Subramanian, V. Balaji, Venkataraman Mahalingam, T. L. Rajaprabhu. 333-340 [doi]
• An Overview of the Open Architecture Test SystemRochit Rajsuman. 341-348 [doi]
• Low Voltage CMOS op-amp with Rail-to-Rail Input/Output SwingS. V. Gopalaiah, A. P. Shivaprasad. 349-354 [doi]
• Microelectronic System for Hall Sensor Power MeasurementsDaniela De Venuto, Marija Blagojevic, Maher Kayal. 355-359 [doi]
• Noise Analysis of a Reduced Complexity Pipeline Analog-to-Digital ConverterHai Phuong Le, Aladin Zayegh, Jugdutt Singh. 360-368 [doi]
• SW/HW Co-design of a Java-based ASIP for Pervasive Computing in Mobile ApplicationsMin Jiang, Bing Yang, Xinan Wang, Tianyi Zhang. 369-371 [doi]
• Test Time Reduction for ACPR Measurement of Wireless Transceivers Using Periodic Bit-Stream SequencesSoumendu Bhattacharya, Ganesh Srinivasan, Sasikumar Cherubal, Abhijit Chatterjee. 372-377 [doi]
• A Tunable VCO for Multistandard Mobile ReceiverV. Vibhute, David Fitrio, Jugdutt Singh, Aladin Zayegh, Aleksandar Stojcevski. 378-386 [doi]
• Integrated MicroPhotonic Wideband RF Interference Mitigation FilterKamal E. Alameh, Abdesselam Bouzerdoum, Selam T. Ahderom, Mehrdad Raisi, Kamran Eshraghian, X. Zhao, Rong Zheng, Zhenglin Wang. 387-390 [doi]
• Multi-band MicroPhotonic Tunable Optical FilterMehrdad Raisi, Selam T. Ahderom, Kamal E. Alameh, Kamran Eshraghian. 391-394 [doi]
• A Novel Design of Beam Steering n-phase OPTO-ULSI Processor for IIPSSeung Min Lee, Stefan Lachowicz, David Lucas, A. M. Rassau, Kamran Eshraghian, Mike Myung-Ok Lee, Kamal E. Alameh. 395-402 [doi]
• Excitation Modes and Transient Response of a Winner-take-all CircuitGanesh Kothapalli. 403-406 [doi]
• Performance Evaluation of Direct Form FIR Filter with Merged Arithmetic ArchitectureZhi Ye, Ravi Kumar Satzoda, Udit Sharma, Naveen Nazimudeen, Chip-Hong Chang. 407-409 [doi]
• The Challenge of Testing RFID Integrated Circuits David Murfett. 410-412 [doi]
• A Wiring-Aware Approach to Minimizing Built-in Self-Test OverheadAbdil Rashid Mohamed, Zebo Peng, Petru Eles. 413-415 [doi]
• Enhancing Delay Fault Testability for FIR Filters Based on Realistic Sequential Cell Fault ModelShyue-Kung Lu, Mau-Jung Lu. 416-418 [doi]
• Simulation of a Communications System - A Designer s PerspectiveVineetha Kalavally, Nader Bin Kamrani. 419-421 [doi]
• SEU Protected CPU for Slow Control on Space VehiclesAndrea S. Brogna, Franco Bigongiari, Fabrizio Bertuccelli, Walter Errico, Simone Giovannetti, Egidio Pescari, Roberto Saletti. 422-424 [doi]
• Implementation of Headset Using BluetoothKyu Hwan Seol, Yeong Seog Lim. 425-427 [doi]
• SCS: A Workflow_Based Smart Control SystemZhiyi Fang, Shuhua Li, Weiguo Xu, Qingkai Meng. 428-430 [doi]
• Synthesis of Dynamic Class Loading Specifications on Reconfigurable HardwareGiovanni Agosta, Francesco Bruschi, Donatella Sciuto. 431-433 [doi]
• The Fastest Carry Lookahead AdderYu-Ting Pai, Yu-Kumg Chen. 434-436 [doi]
• Analog Conversion for FPGA Implementation of the TIGER Transmitter using a 14 bit DACT. Salim, J. Devlin, J. Whittington. 437-439 [doi]
• Blind Signal Extraction Algorithm for the License Plate Matching of Vehicle Positioning SystemShing Tenqchen, Ying-Haw Shu, Ming-Chang Sun, Wu-Shiung Feng. 440-442 [doi]