Abstract is missing.
- Consideration of the Flit Size for Deflection Routing based Network-on-ChipsArmin Runge, Reiner Kolla. [doi]
- PhoenixSim: Crosslayer Design and Modeling of Silicon Photonic InterconnectsSébastien Rumley, Meisam Bahadori, Ke Wen, Dessislava Nikolova, Keren Bergman. [doi]
- Bringing OptoBoards to HPC-scale environments: An OptoHPC simulation engineN. Terzenidis, Pavlos Maniotis, Nikos Pleros. [doi]
- Hierarchical Clustering for On-Chip NetworksRobert Hesse, Natalie D. Enright Jerger. [doi]
- Energy Efficient And Low Latency Interconnection Network For Multicast Invalidates In Shared Memory SystemsMuhammad Ridwan Madarbux, Anouk Van Laer, Philip M. Watts, Timothy M. Jones 0001. [doi]
- Designing an Efficient MPLS-Based Switch for FAT Tree Network-on-Chip SystemsNajwa Salama, Azeddien M. Sllame. [doi]
- Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core SystemsGabriele Miorandi, Mahdi Tala, Marco Balboni, Luca Ramini, Davide Bertozzi. [doi]
- JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application ModelsRafael K. V. Maeda, Peng Yang 0003, Xiaowen Wu, Zhe Wang 0003, Jiang Xu 0001, Zhehui Wang, Haoran Li, Luan H. K. Duong, Zhifei Wang. [doi]