Abstract is missing.
- CMOS Photonics - Bringing Moore's Law to Optical InterconnectAlex G. Dickinson. 3 [doi]
- On-Die Interconnect and Other Challenges for Chip-Level Multi-ProcessingTryggve Fossum. 4 [doi]
- Hands-on with the NetFPGA to build a Gigabit-rate RouterNick McKeown, John W. Lockwood, Jad Naous, Glen Gibb, G. Adam Covington. 7-10 [doi]
- Introduction to Programming High Performance Applications on the CELL Broadband EngineJakub Kurzak, Alfredo Buttari. 11 [doi]
- Design of Interconnection NetworksDennis Abts, John Kim. 12 [doi]
- Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip InterconnectsDongkook Park, Reetuparna Das, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Ravishankar R. Iyer, Chita R. Das. 15-20 [doi]
- Layout-Accurate Design and Implementation of a High-Throughput Interconnection Network for Single-Chip Parallel ProcessingAydin O. Balkan, Michael N. Horak, Gang Qu, Uzi Vishkin. 21-28 [doi]
- Photonic NoC for DMA Communications in Chip MultiprocessorsAssaf Shacham, Benjamin G. Lee, Aleksandr Biberman, Keren Bergman, Luca P. Carloni. 29-38 [doi]
- Backlog Aware Low Complexity Schedulers for Input Queued Packet SwitchesAditya Dua, Nicholas Bambos, Wladek Olesinski, Hans Eberle, Nils Gura. 39-46 [doi]
- Power Aware Management of Packet SwitchesLykomidis Mastroleon, Daniel C. O'Neill, Benjamin Yolken, Nicholas Bambos. 47-53 [doi]
- Implementation of Dynamic Bandwidth Re-allocation in Optical Interconnects using Microring ResonatorsChander Kochar, Avinash Karanth Kodi, Ahmed Louri. 54-64 [doi]
- A Real-Time Worm Outbreak Detection System Using Shared CountersMiad Faezipour, Mehrdad Nourani, Rina Panigrahy. 65-72 [doi]
- Prototyping Fast, Simple, Secure Switches for EthaJianying Luo, Justin Pettit, Martin Casado, John W. Lockwood, Nick McKeown. 73-82 [doi]
- A Memory-Balanced Linear Pipeline Architecture for Trie-based IP LookupWeirong Jiang, Viktor K. Prasanna. 83-90 [doi]
- Building a RCP (Rate Control Protocol) Test NetworkNandita Dukkipati, Glen Gibb, Nick McKeown, Jiang Zhu. 91-98 [doi]
- ElephantTrap: A low cost device for identifying large flowsYi Lu, Mei Wang, Balaji Prabhakar, Flavio Bonomi. 99-108 [doi]
- An Analysis of 10-Gigabit Ethernet Protocol Stacks in Multicore EnvironmentsGanesh Narayanaswamy, Pavan Balaji, Wu-chun Feng. 109-116 [doi]
- Assessing the Ability of Computation/Communication Overlap and Communication Progress in Modern InterconnectsMohammad J. Rashti, Ahmad Afsahi. 117-124 [doi]
- Performance Analysis and Evaluation of Mellanox ConnectX InfiniBand Architecture with Multi-Core PlatformsSayantan Sur, Matthew J. Koop, Lei Chai, Dhabaleswar K. Panda. 125-134 [doi]
- Memory Management Strategies for Data Serving with RDMADennis Dalessandro, Pete Wyckoff. 135-142 [doi]
- Reducing the Impact of the MemoryWall for I/O Using Cache InjectionEdgar A. León, Kurt B. Ferreira, Arthur B. Maccabe. 143-150 [doi]