Table of Contents

• Integrated Test Structures for Reliability Investigation under Dynamic StimuliFlorian Cacho, D. Nouguier, M. Arabi, X. Federspiel, Y. Carminati, M. Saliva. 1-5 [doi]
• Near-Optimal Node Selection Procedure for Aging Monitor PlacementSomayeh Sadeghi Kohan, Arash Vafaei, Zainalabedin Navabi. 6-11 [doi]
• Periodic Aging Monitoring in SRAM Sense AmplifiersHelen-Maria Dounavi, Yiorgos Sfikas, Yiorgos Tsiatouhas. 12-16 [doi]
• Low-cost functional test of a 2.4 GHz OQPSK transmitter using standard digital ATET. Vayssade, Florence Azaïs, Laurent Latorre, Francois Lefevre. 17-22 [doi]
• AMS-RF test quality: Assessing defect severityValentin Guiterrez, Antonio J. Ginés, Gildas Léger. 23-28 [doi]
• Reduced-code static linearity test of SAR ADCs using a built-in incremental ∑Δ converterRenato S. Feitoza, Manuel J. Barragan, Salvador Mir, Daniel Dzahini. 29-34 [doi]
• To Detect or to Correct?Arkady Bramnik, Yiannakis Sazeides. 35-38 [doi]
• A Low-Cost Soft Error Tolerant Read Circuit for Single/Multi-Level Cross-Point RRAM ArraysHossein Bardareh, Amir M. Hajisadeghi, Hamid R. Zarandi. 39-40 [doi]
• A Novel Use of Approximate Circuits to Thwart Hardware Trojan Insertion and Provide ObfuscationHonorio Martín, Luis Entrena, Sophie Dupuis, Giorgio Di Natale. 41-42 [doi]
• A Sequentially Untestable Fault Identification Method Based on n-Bit State Cube JustificationToshinori Hosokawa, Morito Niseki, Masayoshi Yoshimura, Hiroshi Yamazaki, Masayuki Arai, Hiroyuki Yotsuyanagi, Masaki Hashizume. 43-46 [doi]
• On the test of a COTS-based system for space applicationsSara Carbonara, Andrea Firrincieli, Matteo Sonza Reorda, Jan-Gerd Mess. 47-48 [doi]
• An Automatic Approach to Perform FMEDA Safety Assessment on Hardware DesignsJacopo Sini, Massimo Violante. 49-52 [doi]
• An Effective Stochastic Number Duplicator and Its Evaluations Using Composite Arithmetic CircuitsRyota Ishikawa, Masashi Tawada, Masao Yanagisawa, Nozomu Togawa. 53-56 [doi]
• Collective-Aware System-on-Chips for Dependable IoT ApplicationsVasileios Tenentes, Daniele Rossi 0001, Bashir M. Al-Hashimi. 57-60 [doi]
• Predicting the Impact of Functional Approximation: from Component- to Application-LevelMarcello Traiola, Alessandro Savino, Mario Barbareschi, Stefano Di Carlo, Alberto Bosio. 61-64 [doi]
• Modem Gain-Cell Memories in Advanced TechnologiesEsteve Amat, Ramon Canal, Antonio Rubio. 65-68 [doi]
• Design Tradeoffs in Bioimplantable Devices: A Case Study with Bladder Pressure MonitoringShakil Mahmud, Steve J. A. Majerus, Margot S. Damaser, Robert Karam. 69-72 [doi]
• Development flow of on-line Software Test Libraries for asynchronous processor coresA. Floridia, E. Sanchez, Nikolaos Andrikos. 73-78 [doi]
• Fault-Independent Test-Generation for Software-Based Self-TestingPanagiotis Georgiou, Xrysovalantis Kavousianos, Riccardo Cantoro, Matteo Sonza Reorda. 79-84 [doi]
• About the functional test of the GPGPU schedulerBoyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Luca Sterpone. 85-90 [doi]
• Detecting and Resolving Security Violations in Reconfigurable Scan NetworksPascal Raiola, Michael A. Kochte, Ahmed Atteya, Laura Rodríguez Gómez, Hans-Joachim Wunderlich, Bernd Becker 0001, Matthias Sauer 0002. 91-96 [doi]
• Detecting the Existence of Malfunctions in Microcontrollers Utilizing Power AnalysisKento Hasegawa, Masao Yanagisawa, Nozomu Togawa. 97-102 [doi]
• Effective Control Flow Integrity Checks for Intrusion DetectionAmeya Chaudhari, Jacob A. Abraham. 103-108 [doi]
• Resistive and Spintronic RAMs: Device, Simulation, and ApplicationsElena Ioana Vatajelu, Lorena Anghel, Jean Michel Portal, Marc Bocquet, Guillaume Prenat. 109-114 [doi]
• Hardware and Software Techniques for Heterogeneous Fault-ToleranceSemeen Rehman, Florian Kriebel, Bharath Srinivas Prabakaran, Faiq Khalid, Muhammad Shafique 0001. 115-118 [doi]
• Efficient Fault Injection for Embedded Systems: As Fast as Possible but as Accurate as NecessaryPetra R. Maier, Uzair Sharif, Daniel Mueller-Gritschneder, Ulf Schlichtmann. 119-122 [doi]
• Power/Area-Optimized Fault Tolerance for Safety Critical ApplicationsMilos Krstic, Aleksandar Simevski, Markus Ulbricht, Stefan Weidling. 123-126 [doi]
• Robust co-synthesis of embedded control systems with occasional deadline missesAmir R. B. Behrouzian, Dip Goswami, Twan Basten. 127-130 [doi]
• From on-chip self-healing to self-adaptivity in analog/RF ICs: challenges and opportunitiesMartin Andraud, Marian Verhelst. 131-134 [doi]
• Error Resilient Neuromorphic Networks Using Checker NeuronsSujay Pandey, Suvadeep Banerjee, Abhijit Chatterjee. 135-138 [doi]
• CMOS Characterization and Compact Modelling for Circuit Reliability SimulationJavier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández. 139-142 [doi]
• Reliability Estimations of Large Circuits in Massively-Parallel GPU-SPICEVictor M. van Santen, Hussam Amrouch, Jörg Henkel. 143-146 [doi]
• Resistive Switching Behavior seen from the Energy Point of ViewJorge Gomez, Angel Abusleme, Ioannis Vourkas, Antonio Rubio. 147-150 [doi]
• Fault-Resilient Topology Planning and Traffic Configuration for IEEE 802.1Qbv TSN NetworksAyman A. Atallah, Ghaith Bany Hamad, Otmane Aït Mohamed. 151-156 [doi]
• Self-Stabilizing High-Speed Communication in Multi-Synchronous GALS ArchitecturesMartin Perner, Ulrich Schmid 0001. 157-164 [doi]
• Soft error optimization of combinational circuit based on gate sizing and multi-objective particle swarm optimization algorithmXuebing Cao, Liyi Xiao, Linzhe Li, Jie Li, Jiaqiang Li, Jinxiang Wang. 165-170 [doi]
• Minimization of Timing Failures in Pipelined Designs via Path Shaping and Operand TruncationIoannis Tsiokanos, Lev Mukhanov, Dimitrios S. Nikolopoulos, Georgios Karakonstantis. 171-176 [doi]
• Independent N-Well And P-Well Biasing For Minimum Leakage Energy OperationYosuke Okamura, Tohru Ishihara, Hidetoshi Onodera. 177-182 [doi]
• HealthLog Monitor: A Flexible System-Monitoring Linux ServiceAthanasios Chatzidimitriou, George Papadimitriou, Dimitris Gizopoulos. 183-188 [doi]
• Efficient Software-Based Partitioning for Commercial-off-the-Shelf NoC-based MPSoCs for Mixed-Criticality SystemsStefano Esposito, Serhiy Avramenko, Massimo Violante. 189-194 [doi]
• A Capture Safe Static Test Compaction Method Based on Don't CaresSayuri Ochi, Hiroshi Yamazaki, Toshinori Hosokawa, Masayoshi Yoshimura. 195-200 [doi]
• ESIFT: Efficient System for Error InjectionNinghan Tian, Daniel G. Saab, Jacob A. Abraham. 201-206 [doi]
• A New Approach to Threshold Voltage Measurements of TransistorsTheodor Hillebrand, Steffen Paul, Dagmar Peters-Drolshagen. 207-213 [doi]
• The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacksJean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Louis-Barthelemy Faber, Marie-Lise Flottes, Philippe Gendrier, David Hély, Régis Leveugle, Paolo Maistri, Giorgio Di Natale, Athanasios Papadimitriou, Bruno Rouzeyre. 214-219 [doi]
• Emulation of an ASIC Power, Temperature and Aging Monitor System for FPGA PrototypingAlexandra Listl, Daniel Mueller-Gritschneder, Fabian Kluge, Ulf Schlichtmann. 220-225 [doi]
• Adaptive ECC Techniques for Reliability and Yield Enhancement of Phase Change MemoryShyue-Kung Lu, Hui-Ping Li, Kohei Miyase. 226-227 [doi]
• A Test Register Assignment Method Based on Controller Augmentation to Reduce the Number of Test PatternsToshinori Hosokawa, Hiroshi Yamazaki, Shun Takeda, Masayoshi Yoshimura. 228-231 [doi]
• Design and Optimization of Reliable Hardware Accelerators: Leveraging the Advantages of High-Level SynthesisFarah Naz Taher, Mostafa Kishani, Benjamin Carrión Schäfer. 232-235 [doi]
• DRAM Characterization under Relaxed Refresh Period Considering System Level Effects within a Commodity ServerLev Mukhanov, Konstantinos Tovletoglou, Dimitrios S. Nikolopoulos, Georgios Karakonstantis. 236-239 [doi]
• Finding False Paths for Sequential Circuits Using Operations on ROBDDsAnzhela Yu. Matrosova, Sergei Ostanin, Semen Chernyshov. 240-242 [doi]
• Impact of a Laser Pulse on a STT-MRAM Bitcell: Security and Reliability IssuesM. Kharbouche-Harrari, Jérémy Postel-Pellerin, Gregory di Pendina, Romain Wacquez, D. Aboulkassimi, Marc Bocquet, R. Sousa, R. Delattre, Jean Michel Portal. 243-244 [doi]
• Real-Time Validation of Fault-Tolerant Mixed-Criticality SystemsStefano Esposito, Jacopo Sini, Massimo Violante. 245-246 [doi]
• Reliability Improvements for Multiprocessor Systems by Health-Aware Task SchedulingRobert Schmidt, Rehab Massoud, Jaan Raik, Alberto García Ortiz, Rolf Drechsler. 247-250 [doi]
• Self-Healing Imager Based on Detection and Conciliation of Defective PixelsGhislain Takam Tchendjou, Emmanuel Simeu. 251-254 [doi]
• Test Compression Using Extended Nonlinear Binary CodesOndrej Novák. 255-256 [doi]
• Robust Machine Learning Systems: Reliability and Security for Deep Neural NetworksMuhammad Abdullah Hanif, Faiq Khalid, Rachmad Vidya Wicaksana Putra, Semeen Rehman, Muhammad Shafique 0001. 257-260 [doi]
• Cross-Layer Control Adaptation for Autonomous System ResilienceMd Imran Momtaz, Suvadeep Banerjee, Sujay Pandey, Jacob A. Abraham, Abhijit Chatterjee. 261-264 [doi]
• Reliability And Performance Challenges Of Ultra-Low Voltage Caches: A Trade-Off AnalysisAnteneh Gebregiorgis, Mehdi Baradaran Tahoori. 265-268 [doi]
• Shielding Performance Monitor Counters: a double edged weapon for safety and securityAlberto Carelli, Alessandro Vallero, Stefano Di Carlo. 269-274 [doi]
• Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation SchemesShervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan. 275-280 [doi]
• On the Effect of Aging in Detecting Hardware Trojan Horses with Template AnalysisNaghmeh Karimi, Jean-Luc Danger, Sylvain Guilley. 281-286 [doi]
• Towards an automatic approach for hardware verification according to ISO 26262 functional safety standardJacopo Sini, Matteo Sonza Reorda, Massimo Violante, Peter Sarson. 287-290 [doi]
• Performances VS Reliability: how to exploit Approximate Computing for Safety-Critical applicationsGennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Vincent Pouget, Alberto Bosio. 291-294 [doi]