Table of Contents

• Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logicDavid Bol, Dina Kamel, Denis Flandre, Jean-Didier Legat. 3-8 [doi]
• Design and analysis of ultra-thin-body SOI based subthreshold SRAMVita Pi-Ho Hu, Yu-Sheng Wu, Ming-Long Fan, Pin Su, Ching-Te Chuang. 9-14 [doi]
• Slew-aware clock tree design for reliable subthreshold circuitsJeremy R. Tolbert, Xin Zhao, Sung Kyu Lim, Saibal Mukhopadhyay. 15-20 [doi]
• Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuitsDavid Bol, Denis Flandre, Jean-Didier Legat. 21-26 [doi]
• Serial sub-threshold circuits for ultra-low-power systemsSudhanshu Khanna, Benton H. Calhoun. 27-32 [doi]
• Hybrid logical-statistical simulation with thermal and IR-drop mapping for degradation and variation predictionDomenik Helms, Kai Hylla, Wolfgang Nebel. 33-38 [doi]
• Variation-aware supply voltage assignment for minimizing circuit degradation and leakageXiaoming Chen, Yu Wang 0002, Yu Cao, Yuchun Ma, Huazhong Yang. 39-44 [doi]
• A centralized supply voltage and local body bias-based compensation approach to mitigate within-die process variationAmlan Ghosh, Rahul M. Rao, Richard B. Brown. 45-50 [doi]
• Tuning-friendly body bias clustering for compensating random variability in subthreshold circuitsKoichi Hamamoto, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye. 51-56 [doi]
• Statistical static timing analysis considering leakage variability in power gated designsMichael J. Anderson, Azadeh Davoodi, Jungseob Lee, Abhishek A. Sinkar, Nam Sung Kim. 57-62 [doi]
• A low power high noise immunity boost DC-DC converter using the differential difference amplifiersJiwei Fan, Xin Zhou, Liyu Yang, Alex Huang. 63-68 [doi]
• A single inductor dual input dual output DC-DC converter with hybrid supplies for solar energy harvesting applicationsHui Shao, Chi-Ying Tsui, Wing-Hung Ki. 69-74 [doi]
• A CMOS low power current-mode polyphase filterHussain Alzaher, Noman Tasadduq. 75-80 [doi]
• Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current eliminationP. V. Ratna Kumar, Kaushik Bhattacharyya, Tamal Das, Pradip Mandal. 81-86 [doi]
• Inductor design of 20-V boost converter for low power 3D solid state drive with NAND flash memoriesTadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai, Ken Takeuchi. 87-92 [doi]
• PPT: joint performance/power/thermal management of DRAM memory for multi-core systemsChung-Hsiang Lin, Chia-Lin Yang, Ku-Jei King. 93-98 [doi]
• Predict and act: dynamic thermal management for multi-core processorsRaid Zuhair Ayoub, Tajana Simunic Rosing. 99-104 [doi]
• Online work maximization under a peak temperature constraintThidapat Chantem, Xiaobo Sharon Hu, Robert P. Dick. 105-110 [doi]
• Dynamic thermal management using thin-film thermoelectric coolingPedro Chaparro, José González, Qiong Cai, Greg Chrysler. 111-116 [doi]
• A 2.6 µW sub-threshold mixed-signal ECG SoCSteven C. Jocke, Jonathan F. Bolus, Stuart N. Wooters, Travis N. Blalock, Benton H. Calhoun. 117-118 [doi]
• A 0.9V, 65nm logic-compatible embedded DRAM with > 1ms data retention time and 53 less static power than a power-gated SRAMKi Chul Chun, Pulkit Jain, Chris H. Kim. 119-120 [doi]
• Frequency and yield optimization using power gates in power-constrained designsNam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae-Hee Han, Ken Choi, Youngsoo Shin. 121-126 [doi]
• NBTI-aware power gating for concurrent leakage and aging optimizationAndrea Calimera, Enrico Macii, Massimo Poncino. 127-132 [doi]
• The opportunity cost of low power design: a case study in circuit tuningMatthew M. Ziegler, Victor V. Zyuban, George Gristede, Milena Vratonjic, Joshua Friedrich. 133-138 [doi]
• Behavior-level observability don t-cares and application to low-power behavioral synthesisJason Cong, Bin Liu, Zhiru Zhang. 139-144 [doi]
• Minimizing data center cooling and server power costsEhsan Pakbaznia, Massoud Pedram. 145-150 [doi]
• Thinking outside the box: power management at the system level & beyondThomas F. Wenisch. 151-152 [doi]
• A look inside IBM s green data center researchJohn B. Carter. 153-154 [doi]
• Sustainable IT ecosystems and data centersCullen Bash. 155-156 [doi]
• Circuit design in nano-scale CMOS era: opportunities & challengesKevin Zhang. 157-158 [doi]
• Way-tagged cache: an energy-efficient L2 cache architecture under write-through policyJianwei Dai, Lei Wang. 159-164 [doi]
• Way guard: a segmented counting bloom filter approach to reducing energy for set-associative cachesMrinmoy Ghosh, Emre Özer, Simon Ford, Stuart Biles, Hsien-Hsin S. Lee. 165-170 [doi]
• Energy-efficient renaming with register versioningHui Zeng, Ju-Young Jung, Kanad Ghose, Dmitry Ponomarev. 171-176 [doi]
• Cooperative shared resource access control for low-power chip multiprocessorsNoriko Takagi, Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura. 177-182 [doi]
• An energy-efficient checkpointing mechanism for out of order commit processorHui Zeng, Matt T. Yourst, Kanad Ghose. 183-188 [doi]
• Analyzing potential power reduction with adaptive voltage positioning optimized for multicore processorsAbhishek A. Sinkar, Nam Sung Kim. 189-194 [doi]
• Significance driven computation: a voltage-scalable, variation-aware, quality-tuning motion estimatorDebabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy. 195-200 [doi]
• Optimizing total power of many-core processors considering voltage scaling limit and process variationsJungseob Lee, Nam Sung Kim. 201-206 [doi]
• Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selectionAlyssa Bonnoit, Sebastian Herbert, Diana Marculescu, Lawrence T. Pileggi. 207-212 [doi]
• Pulse width modulation for reduced peak power full-swing on-chip interconnectMackenzie R. Scott, Rajeevan Amirtharajah. 213-218 [doi]
• Low power circuit design based on heterojunction tunneling transistors (HETTs)Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, Leland Chang, Steven J. Koester, Dennis Sylvester, David Blaauw. 219-224 [doi]
• A 45nm CMOS 0.35v-optimized standard cell library for ultra-low power applicationsFady Abouzeid, Sylvain Clerc, Fabian Firmin, Marc Renaudin, Gilles Sicard. 225-230 [doi]
• A low power 3D integrated FFT engine using hypercube memory divisionThorlindur Thorolfsson, Nariman Moezzi Madani, Paul D. Franzon. 231-236 [doi]
• Data manipulation techniques to reduce phase change memory write energyWei Xu, Jibang Liu, Tong Zhang. 237-242 [doi]
• vGreen: a system for energy efficient computing in virtualized environmentsGaurav Dhiman, Giacomo Marchetti, Tajana Rosing. 243-248 [doi]
• Near optimal battery-aware energy managementSushu Zhang, Karam S. Chatha, Goran Konjevod. 249-254 [doi]
• Transaction-based adaptive dynamic voltage scaling for interactive applicationsXia Zhao, Yao Guo, Xiangqun Chen. 255-260 [doi]
• Tracking the power in an enterprise decision support systemJustin Meza, Mehul A. Shah, Parthasarathy Ranganathan, Mike Fitzner, Judson Veazey. 261-266 [doi]
• Ranking servers based on energy savings for computation offloadingKarthik Kumar, Yamini Nimmagadda, Yung-Hsiang Lu. 267-272 [doi]
• Leakage- and variability-conscious circuit designs for the 0.5-v nanoscale CMOS eraKiyoo Itoh. 273-274 [doi]
• Non volatile memories to enable system power scalingAl Fazio. 275-276 [doi]
• Low voltage tunnel transistor architecture and its viability for energy efficient logic applicationsSuman Datta. 277-278 [doi]
• Cross-over current suppressing latch compared to state-of-the-art for low-power low-frequency applications with resonant clockingFlavio Carbognani, Luca Henzen. 279-282 [doi]
• Reducing the leakage and timing variability of 2D ICcs using 3D ICsSherief Reda, Aung Si, R. Iris Bahar. 283-286 [doi]
• An optimization strategy for low energy and high performance for the on-chip interconnect signallingGe Chen, Saeid Nooshabadi, Steven G. Duvall. 287-290 [doi]
• A high-performance low-power nanophotonic on-chip networkZheng Li, Jie Wu, Li Shang, Alan R. Mickelson, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, Yihe Sun. 291-294 [doi]
• Exploration of 3D stacked L2 cache design for high performance and efficient thermal controlGuangyu Sun, Xiaoxia Wu, Yuan Xie. 295-298 [doi]
• Power-management-based Chien search for low power BCH decoderShu-Yi Wong, Chunhong Chen, Q. M. Jonathan Wu. 299-302 [doi]
• Low power robust signal processingVeera Papirla, Aarul Jain, Chaitali Chakrabarti. 303-306 [doi]
• Enabling ultra low voltage system operation by tolerating on-chip cache failuresAmin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke. 307-310 [doi]
• Design of multi-mode 4-switch buck-boost controllerLou Jiana, Wu Xiaobo. 311-314 [doi]
• Electromigration study of power-gated gridsAida Todri, Malgorzata Marek-Sadowska. 315-318 [doi]
• A novel 0.5 V 15 µW 1.3 MHz temperature-compensated analog PWM-controller for switch-mode convertersDominic Maurath, Charalambos Andreou, Yiannos Manoli. 323-326 [doi]
• SOI, interconnect, package, and mainboard thermal characterizationJoseph Nayfach-Battilana, Jose Renau. 327-330 [doi]
• N-version temperature-aware scheduling and bindingYousra Alkabani, Farinaz Koushanfar, Miodrag Potkonjak. 331-334 [doi]
• Energy-aware instruction-set customization for real-time embedded multiprocessor systemsSeungrok Jung, Jungsoo Kim, Sangkwon Na, Chong-Min Kyung. 335-338 [doi]
• Power-saving color transformation of mobile graphical user interfaces on OLED-based displaysMian Dong, Yung-Seok Kevin Choi, Lin Zhong. 339-342 [doi]
• An energy-delay efficient 2-level data cache architecture for embedded systemJongmin Lee, Soontae Kim. 343-346 [doi]
• Experimental analysis of sequence dependence on energy saving for error tolerant image processingSe Hun Kim, Saibal Mukhopadhyay, Wayne Wolf. 347-350 [doi]
• A programmable implementation of neural signal processing on a smartdust for brain-computer interfacesYuwen Sun, Shimeng Huang, Joseph Oresko, John Krais, Allen C. Cheng. 351-354 [doi]
• An experimental validation of system level design space exploration methodology for energy efficient sensor nodesSonali Chouhan, M. Balakrishnan, Ranjan Bose. 355-358 [doi]
• It is all about power analysis, exploration and trade-offsSoheil Modirzadeh, Brian Fuller, Sandeep Mirchandani, Jon McDonald, Ran Avinun, Camille Kokozaki. 359-360 [doi]
• Challenges and opportunities in low-power design enablementMojy Chian. 361-362 [doi]
• Dealing with disaggregation in ever-changing world of semiconductorsYankin Tanurhan. 363-364 [doi]
• A 60fps 496mW multi-object recognition processor with workload-aware dynamic power managementJoo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim, Hoi-Jun Yoo. 365-370 [doi]
• The design of a bloom filter hardware accelerator for ultra low power systemsMichael J. Lyons, David Brooks. 371-376 [doi]
• Dynamic power gating with quality guaranteesAnita Lungu, Pradip Bose, Alper Buyuktosunoglu, Daniel J. Sorin. 377-382 [doi]
• End-to-end validation of architectural power modelsMadhu Saravana Sibi Govindan, Stephen W. Keckler, Doug Burger. 383-388 [doi]
• Low power fast and dense longest prefix match content addressable memory for IP routersSatendra Kumar Maurya, Lawrence T. Clark. 389-394 [doi]
• MicroFix: exploiting path-grained timing adaptability for improving power-performance efficiencyGuihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li. 395-400 [doi]
• Adaptive RF chain management for energy-efficient spatial-multiplexing MIMO transmissionHang Yu, Lin Zhong, Ashutosh Sabharwal. 401-406 [doi]
• Remote progressive firmware update for flash-based networked embedded systemsJinsik Kim, Pai H. Chou. 407-412 [doi]
• Power management in energy harvesting embedded systems with discrete service levelsClemens Moser, Jian-Jia Chen, Lothar Thiele. 413-418 [doi]
• Energy efficient sampling for event detection in wireless sensor networksZainul Charbiwala, Younghun Kim, Sadaf Zahedi, Jonathan Friedman, Mani B. Srivastava. 419-424 [doi]
• Ultra low voltage CMOSKaushik Roy. 425-426 [doi]
• Emerging technologies and their impact on system designNorman P. Jouppi, Yuan Xie. 427-428 [doi]
• Green transistors to green architecturesSuman Datta, Vijaykrishnan Narayanan. 429-430 [doi]
• Green at the micro-scale: towards self-powered embedded systemsVijay Raghunathan. 431-432 [doi]