Abstract is missing.
- Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrityBon Woong Ku, Taigon Song, Arthur Nieuwoudt, Sung Kyu Lim. 1-6 [doi]
- Bit-width reduction and customized register for low cost convolutional neural network acceleratorKyungrak Choi, Woong Choi, Kyungho Shin, Jongsun Park. 1-6 [doi]
- SceneMan: Bridging mobile apps with system energy manager via scenario notificationLi Li, Jun Wang, Xiaorui Wang, Handong Ye, Ziang Hu. 1-6 [doi]
- AXSERBUS: A quality-configurable approximate serial bus for energy-efficient sensingYounghyun Kim, Setareh Behroozi, Vijay Raghunathan, Anand Raghunathan. 1-6 [doi]
- Temporal codes in on-chip interconnectsMichael Mishkin, Nam Sung Kim, Mikko H. Lipasti. 1-6 [doi]
- Power optimizations in MTJ-based Neural Networks through Stochastic ComputingAnkit Mondal, Ankur Srivastava. 1-6 [doi]
- Full chip power benefits with negative capacitance FETsSandeep Kumar Samal, Sourabh Khandelwal, Asif I. Khan, Sayeef Salahuddin, Chenming Hu, Sung Kyu Lim. 1-6 [doi]
- Secure Human-Internet using dynamic Human Body CommunicationShovan Maity, Debayan Das, Xinyi Jiang, Shreyas Sen. 1-6 [doi]
- Message from the general co-chairsDavid Garrett, Chia-Lin Yang. 1 [doi]
- A Programmable Event-driven Architecture for Evaluating Spiking Neural NetworksArnab Roy, Swagath Venkataramani, Neel Gala, Sanchari Sen, Kamakoti Veezhinathan, Anand Raghunathan. 1-6 [doi]
- Tiguan: Energy-aware collision-free control for large-scale connected vehiclesMinghua Shen, Guojie Luo. 1-6 [doi]
- Frequency and time domain analysis of power delivery network for monolithic 3D ICsKyungwook Chang, Shidhartha Das, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim. 1-6 [doi]
- A low-power APUF-based environmental abnormality detection frameworkHongxiang Gu, Teng Xu 0001, Miodrag Potkonjak. 1-6 [doi]
- A 32nm, 0.65-10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital fractional-n clock generator for reconfigurable serial I/OWilliam Y. Li, Hyung Seok Kim, Kailash Chandrashekar, Khoa Minh Nguyen, Ashoke Ravi. 1-6 [doi]
- Keynote: A new Silicon Age 4.0: Generating semiconductor-intelligence paradigm with a Virtual Moore's Law Economics and Heterogeneous technologiesNicky Liu. 1 [doi]
- Charge recycled low power SRAM with integrated write and read assist, for wearable electronics, designed in 7nm FinFETVivek Nautiyal, Gaurav Singla, Satinderjit Singh, Fakhruddin ali Bohra, Jitendra Dasani, Lalit Gupta, Sagar Dwivedi. 1-6 [doi]
- Low power in-memory computing based on dual-mode SOT-MRAMFarhana Parveen, Shaahin Angizi, Zhezhi He, Deliang Fan. 1-6 [doi]
- Enabling efficient fine-grained DRAM activations with interleaved I/OChao Zhang, Xiaochen Guo. 1-6 [doi]
- A carbon nanotube transistor based RISC-V processor using pass transistor logicAporva Amarnath, Siying Feng, Subhankar Pal, Tutu Ajayi, Austin Rovinski, Ronald G. Dreslinski. 1-6 [doi]
- Design high bandwidth-density, low latency and energy efficient on-chip interconnectYong Wang, Hui Wu. 1-6 [doi]
- Invited paper: Resilient and energy-secure power managementPradip Bose, Alper Buyuktosunoglu. 1-4 [doi]
- Spin-torque sensors with differential signaling for fast and energy efficient global interconnectsZubair Azim, Kaushik Roy. 1-6 [doi]
- Tutorial: Tiny light-harvesting photovoltaic charger-suppliesGabriel A. Rincón-Mora. 1 [doi]
- Battery assignment and scheduling for drone delivery businessesSangyoung Park, Licong Zhang, Samarjit Chakraborty. 1-6 [doi]
- An energy-efficient and high-throughput bitwise CNN on sneak-path-free digital ReRAM crossbarLeibin Ni, Zichuan Liu, Wenhao Song, J. Joshua Yang, Hao Yu, Kanwen Wang, Yuangang Wang. 1-6 [doi]
- Keynote: Peering into the post Moore's Law worldTodd M. Austin. 1 [doi]
- Gabor filter assisted energy efficient fast learning Convolutional Neural NetworksSyed Shakib Sarwar, Priyadarshini Panda, Kaushik Roy 0001. 1-6 [doi]
- Approximate memory compression for energy-efficiencyAshish Ranjan, Arnab Raha, Vijay Raghunathan, Anand Raghunathan. 1-6 [doi]
- Placement mitigation techniques for power grid electromigrationWei Ye, Yibo Lin, Xiaoqing Xu, Wuxi Li, Yiwei Fu, Yongsheng Sun, Canhui Zhan, David Z. Pan. 1-6 [doi]
- Monolithic 3D IC designs for low-power deep neural networks targeting speech recognitionKyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim. 1-6 [doi]
- CORAL: Coarse-grained reconfigurable architecture for Convolutional Neural NetworksZhe Yuan, Yongpan Liu, Jinshan Yue, Jinyang Li, Huazhong Yang. 1-6 [doi]
- An improved clocking methodology for energy efficient low area AES architectures using register renamingSiva Nishok Dhanuskodi, Daniel Holcomb. 1-6 [doi]
- SENIN: An energy-efficient sparse neuromorphic system with on-chip learningMyung-Hoon Choi, Seungkyu Choi, Jaehyeong Sim, Lee-Sup Kim. 1-6 [doi]
- Online tuning of Dynamic Power Management for efficient execution of interactive workloadsJames R. B. Bantock, Vasileios Tenentes, Bashir M. Al-Hashimi, Geoff V. Merrett. 1-6 [doi]
- A tunable Ultra Low Power inductorless Low Noise Amplifier exploiting body biasing of 28 nm FDSOI technologyJennifer Zaini, Frédéric Hameau, Thierry Taris, Dominique Morche, Patrick Audebert, Eric Mercier. 1-6 [doi]
- Write-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level cachesTsai-Kan Chien, Lih-Yih Chiou, Yi-Sung Tsou, Shyh-Shyuan Sheu, Pei-Hua Wang, Ming-Jinn Tsai, Chih-I Wu. 1-6 [doi]
- A simple yet efficient accuracy configurable adder designWenbin Xu, Sachin S. Sapatnekar, Jiang Hu. 1-6 [doi]
- Message from the program co-chairsJaydeep Kulkarni, Thomas F. Wenisch. 1 [doi]
- QuARK: Quality-configurable approximate STT-MRAM cache by fine-grained tuning of reliability-energy knobsAmir Mahdi Hosseini Monazzah, Majid Shoushtari, Seyed Ghassem Miremadi, Amir M. Rahmani, Nikil Dutt. 1-6 [doi]
- Efficient thermoelectric cooling for mobile devicesYoungmoon Lee, Eugene Kim, Kang G. Shin. 1-6 [doi]
- E-Spector: Online energy inspection for Android applicationsChengke Wang, Yao Guo, Peng Shen, Xiangqun Chen. 1-6 [doi]
- Spatial and temporal scheduling of clock arrival times for IR hot-spot mitigation, reformulation of peak current reductionBhoopal Gunna, Lakshmi Bhamidipati, Houman Homayoun, Avesta Sasan. 1-6 [doi]
- Signal strength-aware adaptive offloading for energy efficient mobile devicesYoung-geun Kim, Sung Woo Chung. 1-6 [doi]
- ShiftMask: Dynamic OLED power shifting based on visual acuity for interactive mobile applicationsHan-Yi Lin, Pi-Cheng Hsiu, Tei-Wei Kuo. 1-6 [doi]
- Keynote: Architecture and software for emerging low-power systemsWen-mei W. Hwu. 1 [doi]
- Frequency governors for cloud database OLTP workloadsRathijit Sen, Alan Halverson. 1-6 [doi]
- Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunitiesMonodeep Kar, Arvind Singh, Sanu Mathew, Anand Rajan, Vivek De, Saibal Mukhopadhyay. 1-2 [doi]
- Invited paper: Secure swarm intelligence: A new approach to many-core power managementAugusto Vega, Alper Buyuktosunoglu, Pradip Bose. 1-6 [doi]
- Architecting large-scale SRAM arrays with monolithic 3D integrationJoonho Kong, Young-Ho Gong, Sung Woo Chung. 1-6 [doi]
- A 0.13pJ/bit, referenceless transceiver with clock edge modulation for a wired intra-BAN communicationJihwan Park, Gi-Moon Hong, Mino Kim, Joo-Hyung Chae, Suhwan Kim. 1-6 [doi]
- A low power duobinary voltage mode transmitterMing-Hung Chien, Yen-Long Lee, Jih Ren Goh, Soon-Jyh Chang. 1-6 [doi]
- Invited paper: Ultra-low energy security circuit primitives for IoT platformsSanu Mathew, Sudhir Satpathy, Vikram Suresh, Ram Krishnamurthy. 1-4 [doi]
- A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable functionMuqing Liu, Chen Zhou, Qianying Tang, Keshab K. Parhi, Chris H. Kim. 1-6 [doi]
- A case for efficient accelerator design space exploration via Bayesian optimizationBrandon Reagen, José Miguel Hernández-Lobato, Robert Adolf, Michael A. Gelbart, Paul N. Whatmough, Gu-Yeon Wei, David M. Brooks. 1-6 [doi]
- Comparative study and optimization of synchronous and asynchronous comparators at near-threshold voltagesSung Justin Kim, Doyun Kim, Mingoo Seok. 1-6 [doi]
- Efficient query processing in crossbar memoryMohsen Imani, Saransh Gupta, Atl Arredondo, Tajana Rosing. 1-6 [doi]
- Exploring sparsity of firing activities and clock gating for energy-efficient recurrent spiking neural processorsYu Liu, Yingyezhe Jin, Peng Li. 1-6 [doi]
- Reconfigurable thermoelectric generators for vehicle radiators energy harvestingDonkyu Baek, Caiwen Ding, Sheng Lin, Donghwa Shin, Jaemin Kim, Xue Lin, Yanzhi Wang, Naehyuck Chang. 1-6 [doi]
- A learning bridge from architectural synthesis to physical design for exploring power efficient high-performance addersSubhendu Roy, Yuzhe Ma, Jin Miao, Bei Yu. 1-6 [doi]
- Workload-driven frequency-aware battery sizingYukai Chen, Enrico Macii, Massimo Poncino. 1-6 [doi]
- Low design overhead timing error correction scheme for elastic clock methodologySungju Ryu, Jongeun Koo, Jae-Joon Kim. 1-6 [doi]
- XNOR-POP: A processing-in-memory architecture for binary Convolutional Neural Networks in Wide-IO2 DRAMsLei Jiang, Minje Kim, Wujie Wen, Danghui Wang. 1-6 [doi]
- Hotspot monitoring and Temperature Estimation with miniature on-chip temperature sensorsPavan Kumar Chundi, Yini Zhou, Martha Kim, Eren Kursun, Mingoo Seok. 1-6 [doi]