Table of Contents

• A Binary-Weighted Switched-Capacitor Gate Driver IC for Overcoming Trade-Offs Between Driving Loss and Delay Time with Gate-Current Feedback Achieving 85% Driving Loss ReductionKohei Horii, Koutaro Miyazaki, Shusuke Kawai, Hiroaki Ishihara. 1-3 [doi]
• A 3.19pJ/b Electro-Optical Router with 18ns Setup Frame-Level Routing and 1-to-6 Wavelength-Flexible Link Capacity for Photonic InterposersYvain Thonnart, Christian Bernard, Stéphane Bernabé, Myriam Assous, Laura Boutafa, Benoît Charbonnier, Rémi Franiatte, César Fuguet, Olivier Guille, Vincent Josselin, Stephane Malhouitre, Laurent Mendizabal, Andre Myko, Damien Saint-Patrice, Remi Velard, Jean Charbonnier. 1-3 [doi]
• A Multi-Range, Multi-Resolution LiDAR Sensor with 2,880-Channel Modular Survival Histogramming TDC and Delay Compensation Using Double Histogram SamplingMinkyung Kim 0014, Junsang Bae, Donghyuk Kim, Jung-Hoon Chun, Seong-Jin Kim, Jaehyuk Choi 0001. 1-3 [doi]
• A ±60mA-Inaccuracy Low-Side Average Current Sensor with Operating-Conditions-Insensitive Control Supporting 0.1-to-3A Load Range and Sub-100ns Sample Time for Automotive USB Charge ApplicationJian-Jun Kuang, Xin-ming, Xin-Ce Gong, Tian-Chen Lang, Xiang Geng, Bo Zhang. 1-3 [doi]
• 2, 17.4TOPS/W Generative Diffusion Accelerator Enabled by Hardware-Compiler Co-Optimization of Memory Hierarchy and Operator ParallelismShih-Wei Hsieh, Yi-Syuan Chen, Ping-Yuan Tsai, Ming-Hung Lin, Chia-Yuan Cheng, Lien-Feng Hsu, Po-Hao Huang, Hung-Wei Chih, Po-Han Chiang, Chia-Ming Chang, Ming-Hsuan Chiang, Chia-Hung Yuan, Sheng-Po Kuo, Viswanath Uggu, Chun-Kun Chan, Ming-En David Shih, Yu-Cheng Tseng, Hsin-Ping Cheng, Stan Huang, Chia-Ping Chen, Shen-Kai Chang, Chih-Ming Wang, Po-Yu Yeh, Jett Liu, Yung-Chang Chang, Chi-Cheng Ju, Yucheun Kevin Jou. 1-3 [doi]
• A 212Gb/s/λ 0.91pJ/b Direct-Drive O-Band Monolithic Coherent Transmitter Based on Carrier-Injection-Mode Mach-Zehnder ModulatorAntroy Roy Chowdhury, Wahid Rahman, Ahmed ElShater, Tamer A. Ali 0001, Vladimir Stojanovic. 1-3 [doi]
• A 98.5dB-SNDR 250kHz-BW 1V-Supply Continuous-Time Zoom ADC with Smart-Tracking and Floating-Tail-Resistor Linearized Gm-C Loop FilterChaoyang Xing, Yilu Cui, Sining Pan, Yi Zhong, Nan Sun 0001, Lu Jie 0001. 1-3 [doi]
• 33.6 A Frequency-Translated, 1-to-5GHz Centred, All-Passive, Programmable-Bandwidth, Switched-Capacitor Delay Line with 6.5-to-8.2dB Delay-Independent Insertion Loss in 65nm CMOSMohmad Aasif Bhat, Imon Mondal. 1-3 [doi]
• 24.1 A 28nm CMOS 1-Chip In-Pixel Memory Backplane Circuit with Pixel-Level Sensing and Compensation for 6652-PPI MicroLED AR GlassesYongil Kwon, Sunkwon Kim, Youngkil Choi, TaeHyun Kwon, Seongyoung Ryu, Sewhan Na, Kangjoo Kim, Uijong Song, Hyun-Wook Lim, Jongwoo Lee, Jae Yeol Lee. 1-3 [doi]
• 14.1 THz-TSI: A 0.33pJ/b 264Gb/s Through-Silicon Interconnect Module for 3D Integration Utilizing Terahertz CouplingChen Jiang, Xiaodi Feng, Xiaohan Shen, Chixiao Chen, Qi Liu 0010, Ming Liu 0022, Ningsheng Xu. 1-3 [doi]
• A Battery-Powered Hybrid Resonant Pulse-Train Generator with Adaptive Frequency Tracking and Residual Energy Recycling for Ultrasonic ImplantsXiayang Li, Wenyu Peng, Limitha Kumar, Xiaoxi Zhao, Cheng Huang, Sijun Du. 1-3 [doi]
• AI-Enabled End-to-End Design in RFICs with Controllable Architectural Style from 'Classical' to 'Non-Intuitive' for mm-Wave/sub-THz LNAsJonathan Zhou, Emir Ali Karahan, Juho Park, Sherif Ghozzy, Kaushik Sengupta. 1-3 [doi]
• A 0.62μW/sensor 82fps Time-to-Digital Impedance Measurement IC with Unified Excitation/Readout Front-End for Large-Scale Piezo-Resistive Sensor ArrayJiayang Li 0002, Qingyu Zhang, Sohmyung Ha, Andreas Demosthenous, Dai Jiang, Yu Wu 0007. 1-3 [doi]
• A Fractional-N Digital PLL with a Supply-Insensitive DTC Achieving -62dBc Spur and 69fs Jitter Under 10mVpp Sinusoidal DTC Supply Ripple and 6.2mVrms DTC Supply NoiseDamiano Fagotti, Riccardo Moleri, Michele Rossoni, Daniele Lodi Rizzini, Pietro Salvi, Stefano Gallucci, Giovanni Rocco Trotta, Andrea Leonardo Lacaita, Simone Mattia Dartizio, Salvatore Levantino. 1-3 [doi]
• A 40Gb/s 8mW-OMA 1-to-N VCSEL Driver for Parallel and Wireless Optical Links Using 150nm GaN HEMTShuo Sarah Feng, Fuzhan Chen, Ruitao Matthew Ma, Hongyu Bruce Bao, Kangping Zhong, Alan Pak Tao Lau, Chik Patrick Yue. 1-3 [doi]
• A 512ch 10b Source-Driver IC with Current-Mode Auto-Zeroing Scheme Achieving 1.4mV DVO and 600ns 1-Horizontal Time for Mobile OLED DisplaysYousung Park, Gyu-Wan Lim, Hyun-Sik Kim. 1-3 [doi]
• 2 Current-Pulse-Injection Crystal Oscillator Featuring Capacitively Biased Amplifier with 242.2dBc/Hz PN FoM @1KHz OffsetHaihua Li, Dan Shi, Qi Zhou, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei. 1-3 [doi]
• 22.1 A Cryo-CMOS Color-Center Quantum Controller with Diamond Waveguide Micro-Chiplet IntegrationJinchen Wang, Yuyang Han, Isaac B. Harris, Eunseok Lee 0002, Yong Hu, Di Liu, Dirk R. Englund, Ruonan Han 0001. 1-3 [doi]
• Advancing Horizons for AI: Perspectives on Semiconductor InnovationsRick Tsai. 10-15 [doi]
• 1.2 Quantum Computing - Toward Large-Scale Fault-Tolerant Quantum ComputingHeike Riel. 16-22 [doi]
• Powering the AI Supercycle: Design for AI and AI for DesignAnirudh Devgan. 26-34 [doi]
• Empowering the next Wave of Silicon EngineersHope Giles. 35-39 [doi]
• 2.1 AMD Instinct MI350 Series GPUs: CDNA 4-Based 3D-Stacked 3nm XCDs and 6nm IODs for AI ApplicationsRamasamy Adaikkalavan, Alan Smith 0003, Teja Singh, Sundar Rangarajan, Eric Chapman, Samuel Naffziger, Subramaniam Maiyuran, Candy Chen, Sriram Sundaram, Mark Silla, Duncan Law, Kathy Hoover, Samuel Lipson, Kevin Duda, Vinay Parthasarathy, Deepesh John, Hanish Vemulapalli, Srinivas Pavan Kumar Gade. 42-44 [doi]
• A Quad-Chiplet AI SoC with Full-Chip Scalable Mesh Over 16Gb/s UCIe-Advanced Die-to-Die Interface for Large-Scale AI InferencingChang-Hyo Yu, Jaewan Bae, Jinseok Kim, Hongyun Kim, Wongyu Shin, Jae-Sung Yoon, Young-Jae Jin, Jungju Oh, Jaebong Lee, Eunseo Kim, Miock Chi, Sungpill Choi, Donghan Kim, Hyunje Jo, Hyunho Kim, Hyun-Seok Heo, Hyunsung Kim, Seung-Goo Kim, Myung-Hoon Choi, Sangeun Je, Junhee Ham, Juyeong Yoon, Yashael Faith Arthanto, Sung-il Bae, Sanggyu Park, JoungWoo Lee, Heeyoung Chae, Kiljun Ryu, Yongjik Kim, Jin-O. Seo, Nara Cho, Taeyoung Jeon, Gukchae Ahn, Myoungoh Ki, Junkyeong Choi, Seungcheol Baek, Daehoon Kim, Juhwan Kim, Sungmoon Kang, Sieon Son, Minseo Kim, Yeounghwan Choe, Younggeun Lee, Sunghyun Park, Jinwook Oh. 44-46 [doi]
• 2.3 A 71.3mJ/Frame End-to-End Driving Processor with Flexible Heterogeneous Core Orchestration via Sparsity ReasoningJueun Jung, Sangho Lee, Junghyun Yoo, Ghangmin Yun, Kyuho Jason Lee. 46-48 [doi]
• UniC-Vision: A 14.4Gb/s 7.3pJ/b Universal Vision Transformer OFDM Channel Estimation Accelerator for B5G/6G AI-RANSangbu Yun, Chanhee Lee, Soonhyun Kwon, Jeongtaek Chang, Zhengya Zhang, Youngjoo Lee. 48-50 [doi]
• 2, 14.4ns, 13.1pJ/b Forward Error Correction with Ordered-Statistics Post Processing for Ultra-Reliable and Low-Latency CommunicationsCheng-Hsun Lu, Wei Tang 0010, Jaehee Kim, Youngjoo Lee, Zhengya Zhang. 50-52 [doi]
• Spyre: An Inference-Optimized Scalable AI Accelerator for Enterprise WorkloadsMatthew Cohen, Monodeep Kar, Swagath Venkataramani, Viji Srinivasan, Brian Veraa, Matthew M. Ziegler, Nianzheng Cao, Ashish Ranjan 0001, Joel Silberman, Michael Guillorn, Sandra Woodward, JohnDavid Lancaster, Josh Hursey, Kyu-hyoun Kim, Alberto Mannari, Amrit Nagarajan, Ananda Samajdar, Bahman Hekmatshoartabari, Bob Galbraith, Ching Zhou, David L. Satterfield, Gregory S. Still, Gustavo Tellez, Indira Nair, Indu Masilamanai, Jinwook Jung, Kavi Randhawa, Marcel Schaal, Martin Lutz, Paul Crumley, Philip Jacob, Prasanth Chatarasi, Radhika Jain, Sae Kyu Lee, Sanchari Sen, Sarada Krithivasan, Scot Rider, Shubham Jain 0004, Siyu Koswatta, Thomas Roewer, Tom Gooding, Victor Ferrari, Vidhi Zalani, Zhibin Ren, Kevin Reick, Lisa Maurice, Christopher J. Gonzalez, Chris Catalino, Ryan Nett, Pong-Fei Lu, Robert M. Senger, Leland Chang. 52-54 [doi]
• Tiamat: A 98-to-134ms/Step Transformer-Based Diffusion Model Processor Supporting Classifier-Free Guidance for Image GenerationPo-Yen Lu, Po-Wei Chen, Shau-Hua Yeh, Zhi-Jun Zhang, Yong-Tai Chen, Ting-Yu Wang, Chao-Tsung Huang. 54-56 [doi]
• 2.9 A 0.24mJ/Frame Quadratic Interpolation 4DGS Processor with Recursive Computation Reuse and Tree-Based Parallel-RenderingXiaolong Yang, Yang Wang 0089, Wende Xu, Yubin Qin, Huanyu Wang, Ruiqi Guo, Zhiheng Yue, Jiangyuan Gu, Shaojun Wei, Yang Hu 0001, Shouyi Yin. 58-60 [doi]
• 2.10 A 1286fps 0.39mJ/Frame Modeling/Rendering Unified 3D GS Processor with Locality-Optimized Computation and Reconfigurable ArchitectureHedi Wang, Xiaoyu Feng, Weichen Gao, Huazhong Yang, Yongpan Liu. 60-62 [doi]
• 3.1 A Multimodal Biosensing System-on-Chip with Integrated Wireless Transceiver and Power Management for Stress MonitoringMin-Hua Chang, Lin Chou, Yen-Jen Liu, Chen-Hsing Hsu, Ying-Yu Yang, Bo-Cheng Juan, Guan-Yu Lin, Yi-Jie Lin, Yao-Wei Huang, Nitish Kumar, Shu-Ping Lin, Yu-Te Liao. 64-66 [doi]
• 3.2 A Near-Field RF Reflection Transceiver ASIC for Continuous Unobtrusive Blood Pressure MonitoringYiming Han, Neelotpala Kumar, Linran Zhao, Jide Yinka Adebiyi, Linrui Jiang, Hao Lu, Gina Perkins, Hirofumi Tanaka, Deji Akinwande, Yaoyao Jia. 66-68 [doi]
• 3.4 an Ultrasound-Powering TX with Standing-Wave Peak Tracking Employing Adiabatic Power Sensing Achieving 82% Power-Tracking Accuracy and <90ms Settling Time for Brain ImplantsMarios Gourdouparis, Chengyao Shi, Jiang Liu 0001, Yuming He, Stefano Stanzione, Wouter A. Serdijn, Yao-Hong Liu. 70-72 [doi]
• A Simultaneous Wireless Power and Full-Duplex Data Transfer System Over a Single Inductive Link Achieving 17/3.4Mb/s and 61.1% Efficiency for Miniature Biomedical ImplantsTianqi Lu, Sijun Du. 72-74 [doi]
• 4.1 A 0.64mA, -108.2dB THD+N Class-D Amplifier with Neural-Assisted Pre-Reconfiguration for Smart Power OptimizationKaiwen Zhou 0004, Yuxiang Tang, Zhongqiu Shen, Xuecheng Yang, Tianxiang Qu, Yiming Wang, Shen Ye, Zhiliang Hong 0001, Jiawei Xu 0001. 76-78 [doi]
• A -102.2dB THD+N, 92% Efficiency, 1.08mW Idle Power Digital-Input Class-D Amplifier with Power-Adaptive Techniques and Dual-Edge Pulse-Width Adjustment ModulatorMiao Zhang 0027, Huajun Zhang 0001, Domenico Maria Lombardo, Qinwen Fan. 78-80 [doi]
• 4.4 A 2.1-to-3.7ppm/°C Bandgap Voltage Reference with a Current-Domain TC Compensation and ±0.06% Inaccuracy from -40°C to 125°C in 130nm CMOSZhong Tang, Sining Pan, Xiao-peng Yu 0002, Nianxiong Nick Tan, Zhangming Zhu. 82-84 [doi]
• A 1ppm/°C and ±0.066% 3σ Accuracy Bandgap Reference with Temperature-Adaptive PTAT ScalingJiaqing Rui, Liangjian Lyu, Yuting Wan, Kexin Shan, Wenxian Gu, C.-J. Richard Shi, Xing Wu 0005. 84-86 [doi]
• An Integrated Voltage and Current Reference Together Achieving 5.7 and 9.1ppm/°C from -40 to 125°CLele Fang, Yan Zhu 0001, Rui P. Martins, Chi-Hang Chan. 86-88 [doi]
• 5.1 A Formation Flight Phased-Array Transceiver for Spatial Power Combining and Distributing Architectures in Direct-to-Device-Communication Satellite ConstellationsKeito Yuasa, Yuya Takahashi, Shunya Watanabe, Sena Kato, Sou Ema, Genma Hattori, Atsushiro Naka, Sumio Morioka, Takahiro Inagawa, Kentaro Murata, Naoki Honma, Jill C. Mayeda, Atsushi Shirane. 90-92 [doi]
• 5.2 A 28GHz Frequency-Diverse Sub-Array TX with Secret Phase Keys and Antenna Subset Modulation for Eavesdropping-Resilient Wireless CommunicationQiang Zhou 0012, Yumin Su, Hao Guo, Yaolong Hu, Kaiyuan Yang 0001, Taiyun Chi. 92-94 [doi]
• 5.3 SPARTA: A Scalable, Programmable and Active mm-Wave Dual-Surface Reflect/Transmit Array with Integrated Gain and Phase Control Allowing Bidirectional Signal Routing Capability for Robust and Reconfigurable mm-Wave Networks at 60GHzMuhamed Allam, Wenkai Fang, Zijian Shao, Hooman Saeidi, Alexander Stepko, Kaushik Sengupta. 94-96 [doi]
• 5.4 A 140GHz Full-Duplex CMOS Transceiver with Metasurface-Integrated Self-Interference-Cancelling Antenna Supporting 16Gb/s 16-QAM Dual-Mode Bidirectional CommunicationJiawei Yang, Yizhu Shen, Shizhe Xu, Zhongyuan Zhang, Zhen Lin, Yifan Ding, Yun Qian, Jiapeng Wan, Yuancheng Cai, Min Zhu, Sanming Hu. 96-98 [doi]
• Full-Duplex RF Canceler Achieving Wideband High-SI-Power Low-Noise Cancellation Through a Novel N-Path-Filter-Based Architecture and ML-Based Canceler ConfigurationLakshminarasimha Sastry Garimella, Alfred Davidson, Nishant Patil, Yuan Ma, Ammaar Junaid, Kaustubh Pabba, Harish Krishnaswamy. 100-102 [doi]
• 6.2 A Phased-Array-Inspired Broadband RF Signal Processor for 2-to-32GHz Spectrum SensingLiwen Zhong, Meijun Tian, Wooram Lee. 102-104 [doi]
• A 2×2 10GS/s TTD BF Receiver Utilizing Charge-Based Summation with 10.5GHz Bandwidth and SNDR/SFDR with 49.5dB/57.5dBc in 22nm CMOSEnne Wittenhagen, Dominik Wilding, Patrick J. Artz, Sebastian Linnhoff, Philipp Scholz, Friedel Gerfers. 104-106 [doi]
• A 436-to-472GHz 4-Element IF Beamforming Phased-Array Receiver in 65nm CMOSHao Guo, Hao-Tao Hu, Zhicheng Lin, Zijun Guo, Xiaoyue Xia, Kam Man Shum, Chi Hou Chan. 106-108 [doi]
• A 26/28/37/39GHz Reconfigurable Fully Connected MIMO Receiver Front-End with On-Chip Diplexer Achieving 52-to-70dB Blocker RejectionXuhao Jiang, Qin Chen, Ziang Zhang, Haiyang Xia, Shun Zhang, Yang Han, Xin Chen 0043, Depeng Cheng, Long He, Xu Wu, Lianming Li, Xiaohu You 0001. 108-110 [doi]
• 7.1 54×42 LiDAR 3D-Stacked System-On-Chip with On-Chip Point Cloud Processing and Hybrid On-Chip/Package-Embedded 25V Boost GenerationNeale A. W. Dutton, Xavier Branca, Mathieu Thivin, Steven Collins, Herve Thuaire, Fabrice Martin, Vincent Clemencon, Mohammed Al-Rawhani, Duncan Hall, Axel Crocherie, Cédric Pastorelli, Sophie Taupin, Severin Trochut, Abhishek Singh, Andreas Assmann, Bruce Rae, Pascal Mellot. 112-114 [doi]
• VoxCAD: A 0.82-to-81.0mW Intelligent 3D-Perception dToF SoC with Sector-Wise Voxelization and High-Density Tri-Mode eDRAM CIM MacroHaoyang Sang, Zhao Wang, Longzhen He, Guangshu Zhao, Wenao Xie, Bo Wang 0012, Rui Paulo Martins, Man Kay Law. 114-116 [doi]
• A 480×320 CMOS LiDAR Sensor with Tapering 1-Step Histogramming TDCs and Sub-Pixel Echo ResolversWonjong Roh, Canxing Piao, Taehoon Jeon, Junsang Bae, Jung-Hoon Chun, Seong-Jin Kim, Jaehyuk Choi 0001. 118-120 [doi]
• 7.5 a 26.0mW 30fps 400X300-Pixel SWIR Ge-SPAD dToF Range Sensor with Programmable Macro-Pixels and Integrated Histogram Processing for Low-Power AR/VR ApplicationsMatteo Perenzoni, Koichi Okamoto, Fabrizio De Nisi, Daniele Perenzoni, Ji-Yong Jeong, Yu Zou, Hanning Mai, Gabriele Quarta, Francesco Paolo Mattioli Della Rocca, Yusuke Okamura, Davide Marani, Michele Brian, Daniele Giorgetti, Soichi Ochiai, Keiji Tatani, David Stoppa. 120-122 [doi]
• A 128×96 Multimodal Flash LiDAR SPAD Imager with Object Segmentation Latency of 18μs Based on Compute-Near-Sensor Ising Annealing MachineJingyi Wang, Tao Hong, Bu Chen, Zhangcheng Huang 0001, Qi Liu 0010, Ming Liu 0022. 122-124 [doi]
• 7.7 A Fully Reconfigurable Hybrid SPAD Vision Sensor with 134dB Dynamic Range Using Time-Coded Dual ExposuresKieop Hong, Jubin Kang, Jung-Hye Hwang, Insang Son, Seonghyeok Park, Jung-Hoon Chun, Jaehyuk Choi 0001, Seong-Jin Kim. 124-126 [doi]
• 7.8 A 55nm Intelligent Vision SoC Achieving 346TOPS/W System Efficiency via Fully Analog Sensing-to-Inference PipelineZhengke Yang, Haofeng Yu, Xiao Liu, Zhen Kong, Humiao Li, Liang Ran, Zhichao Lyu, Xinhe Feng, Liang Zhao, Yida Li, Jiamin Li, Feichi Zhou, Longyang Lin. 126-128 [doi]
• --Random-Noise 1.5μm-Pixel-Pitch 12MP Global-Shutter-Equivalent CMOS Image Sensor with 3μm Digital Pixels Using Quad-Phase-Staggered Zigzag Readout and Motion CompensationSanggwon Lee, Sun-Young Yoo, Yeongseok Shim, Yong Suk Choi, Daehee Bae, Masamichi Ito, Deokha Shin, Si Gyoung Koo, Sung-Jae Byun, Gihwan Cho, Hyukbin Kwon, Jaehun Jeong, Bumjun Kim, Su-Hyun Han, Youna Lee, Hiroyuki Sugihara, Junghoon Jung, Suksan Kim, Kyungtae Lim, Wonoh Ryu, Yongjun Kim, Seung-Sik Kim, Heesung Shim, Min-Woong Seo, Jae Kyu Lee, Jonghyun Go, Jaihyuk Song. 128-130 [doi]
• 7.10 A 200MP ${0. 6 1} {\mu} \mathrm{m}$-Pixel-Pitch CMOS Imager with Sub-1e Readout Noise Using Interlaced-Shared Transistor Architecture and On-Chip Motion Artifact-Free HDR Synthesis for 8K Video ApplicationsRichard Xu, Guanjing Ren, Yaowu Mo, Dekui Qi, Qian Wang, Shengxin Zhang. 130-132 [doi]
• A 48Gb/s/lane 1.24Tb/s/mm UCIe-Compliant Die-to-Die Link Over 30mm Standard PackageSusnata Mondal, Sashank Krishnamurthy, Shuhei Yamada, Zhaokai Liu, Junyi Qiu, Soumya Bose, Zuoguo Wu, Gerald Pasdast, James E. Jaussi, Mozhgan Mansuri. 134-136 [doi]
• 2 0.36pJ/b UCIe-Like Die-to-Die Interface Featuring Edge-Triggered Transceivers in 3nm with Active LSI PackagingWei-Chih Chen, Mu-Shan Lin, Chien-Chun Tsai, Shenggao Li, Wei-Shuo Lin, Yu-Jie Huang, Nai-Chen Cheng, Yu-Chi Chen, Wen-Hung Huang, Chin-Hua Wen, Hsin-Hung Kuo, Han-Tzung Ke, Jie-Ren Huang, Chang-Yi Li, Sheng-Tsung Lai, Shu-Chun Yang, Kuan-Ting Chou, Pei-Chen Chiou, Tsung-Hsien Tsai, Yi-Ting Chen, Yen-ming Chen, Kenny Cheng-Hsiang Hsieh. 136-138 [doi]
• A 0.23pJ/b 24Gb/s Modular D2D Interface with Zero Wake Penalty Clock Gating in 3nmRavi Shivnaraine, Charles Boecker, Eric Groen, Simon Li, Ping Lu, Socrates D. Vamvakos, Roxanne Vu, Chris Hanke, Shankar Tangirala, Wen Liu, Marina Salik, Kevin Bartholomew, Sushmitha Reddy, Alex Tessitore, Aws Shallal, Kalyan Nallaparaju, Jin Liang, Minhan Chen, Shaishav Desai. 138-140 [doi]
• 8.4 A 112Gb/S/Wire Single-Ended Simultaneous Bi-Directional Transceiver with Dynamic Equalizer for Die-to-Die Interface in 28nm CMOSZhiwen Huang, Zhifei Wang, Bingyi Ye, Tianchen Ye, Dunshan Yu, Wei Wang, Weixin Gai. 140-142 [doi]
• 8.5 A 112Gb/s 0.76pJ/b Reference-Less Mixed-Signal PAM-4 CDR in 28nm CMOSZhaoyu Zhang, Yiqing Xu, Jian Liu 0021, Nanjian Wu, Zhao Zhang 0004, Liyuan Liu. 142-144 [doi]
• 8.6 A 280mW 112Gb/s PAM-4/NRZ Transceiver for Low-Power IOs in 5nm FinFET TechnologyUllas Singh, Kumar Thasari, Nitin Nidhi, Arvindh Iyer, Saurabh Surana, Batu Dayanik, Yuanfang Li, Mohammadamin Torabi, Jun Won Jung, Alberto Grassi, Mehrdad Fahimnia, Hiroshi Kimura, Faramarz Bahmani, Hao Chen, Alex Wang, Chen Zhao, Yuan Fang, Allen Chen, Afshin Momtaz, Namik Kocaman. 144-146 [doi]
• A 112Gb/s PAM-4 SBD Transceiver with Mismatch-Compensated 2×VDD Hybrid and Two-Step Echo Canceller in 28nm CMOSHuanfa Sun, Shangjie Wei, Yu Su, Chenyao Cao, Yujie Zeng, Yukun He, Zhouchi Duan, Guohe Zhang, Xiaoyan Gui. 146-148 [doi]
• 8.8 A 0.292pJ/b 56Gb/s/wire Capacitively Driven Simultaneous Bidirectional Transceiver with PVT/Mismatch Tracking for XSR and D2D Interfaces in 28nm CMOSKahyun Kim, Yoona Lee, Dae-Hoon Na, Ha-Jung Park, Jeongeun Song, Woo-seok Choi. 148-150 [doi]
• 8.9 A 72Gb/s/pin Single-Ended Simultaneous Bi-Directional Transceiver with C-Peaking Leakage Cancellation and Dual-Loop Hybrid Impedance Calibration for Chiplet InterfacesXuxu Cheng, Hongzhi Wu, Zhenghao Li, Weitao Wu, Xiongshi Luo, Yangyi Zhang 0002, Quan Pan 0002. 150-152 [doi]
• 8.10 A 180-to-240Gb/s Analog-Intensive PAM-4 Transmitter with 0.70pJ/b Analog Power Efficiency in 65nm CMOSZiyi Lin, Haikun Jia, Wei Deng 0001, Shitu He, Chang Liu, Zhihua Wang 0001, Baoyong Chi. 152-154 [doi]
• A 1.59pJ/b 112Gb/s PAM-4 and 1.06pJ/b 168Gb/s PAM-8 Resistor-Less 7-Bit SST DAC-Based Transmitter with 8-Tap FFE in 28nm CMOSYao-Hung Tsai, Ming-Han Chuang, Shen-Iuan Liu. 154-156 [doi]
• A Single-Power-Link 13.56MHz Wireless Power and Data Transfer System with Synchronized Phase-Shifted Time-Multiplexing Dual Uplinks for Implantable VoltammetryZhenhao Li, Junyao Tang, Nawab Singh, Jianqiang Jiang, Lei Zhao 0018, Wenshuo Zhu, Xuan Sun, Liang Dong, Cheng Huang 0004. 158-160 [doi]
• 9.2 A 91%-Efficiency Single-Stage Bipolar Quad-Output Regulating Rectifier with Event-Driven Output Power Enhancement via Coil-Reused DC-DC for Wireless Power TransferTianqi Lu, Bo Zhao 0003, Sijun Du. 160-162 [doi]
• An Output-Domain-Independent Single-Transmitter-Dual-Receiver Wireless Power Transfer System with Detuned-Tank and Time-Multiplexing Control for Adaptive Power DistributionYutang Chen, Yifan Lin, Dihu Chen, Jianping Guo 0004. 162-164 [doi]
• 9.4 A Multi-Coil Scalable Energy-Shared Wireless Power Receiver Network for Distributed Time-Division-Multiplexing Somatosensory Cortex StimulationKai Cui 0006, Yan Lu. 164-166 [doi]
• A 3nm, 400TOPS, 1080k DMIPS SoC with Chiplet Support for ASIL D Automotive Cross-Domain ApplicationsShiro Machida, Kazuki Fukuoka, Tomoya Onda, Nobuhiro Yada, Hiroyuki Nakano, Sho Yamanaka, Hung Van Cao, Yusaku Hara, Takahiro Irita, Kohei Wakahara, Cyril Cordoba, Tatsuya Kamei, Yasuhisa Shimazaki. 168-170 [doi]
• 10.2 A Dynamic Performance Augmentation in a 3nm-Plus Mobile CPUChien-Yu Lu, Bo-Jr Huang, Sung S.-Y. Hsueh, Trong Hieu Tran, Eric Jia-Wei Fang, Chao-Yang Yeh, Quan Sun, Tao Chen, HsinChen Chen, Huaichung Chang, C.-J. Tsai, Yi-Chang Zhuang, Barry Chen, Ericbill Wang, Hugh Mair, Shih-Arn Hwang. 170-172 [doi]
• A 2nm Clock-Edge Architecture for Processor Clock-Power ReductionYimai Peng, Daniel Yingling, Basma Hajri, Robert Vachon, Fikre Tsigabu Gebreyohannes, Vincent Li, Ghanshyam Chhetri, Keith A. Bowman. 172-174 [doi]
• 2 16-to-1600 MHz All-Digital Fractional Divider Using AUX-DLL for Background LMS-Based DTC CalibrationAhmed Elkholy, Yousr Ismail, Zhi Chao Huang, Adesh Garg, Ali Nazemi, Jun Cao 0001, Afshin Momtaz. 174-176 [doi]
• Proactive Power Management-Based Supply Regulation with Online Learning for Variation-Tolerant Workload-Aware Droop Mitigation in 28nm CMOSXi Chen 0099, Andrew Liss, William Covington, Qiankai Cao, Yiqi Li, Kang Wei 0001, Raveesh Magod, Muhammad Khellah, Xin Zhang 0025, Jie Gu 0001. 176-178 [doi]
• 2 3D Network on ChipPhil C. Knag, Gregory K. Chen, Shanshan Xie, Satish Yada, Wei Wu, Yu-Shiang Lin, Alexander Kashirin, Xiemei Meng, Russell Criss, Ana Sonia Leon, Carlos Tokunaga, Ram K. Krishnamurthy, James W. Tschanz. 178-180 [doi]
• A 28nm Mode-Reconfigurable CAM-CIM Hybrid Complete 3-SAT Solver Supporting Conflict-Driven Clause Learning with 100% SolvabilityZihan Wu 0005, Xiyuan Tang, Lishan Lin, Youming Yang 0002, Haoyang Luo, Bocheng Xu, Yitao Liang, Xiaochen Bo, Yuan Wang 0001. 180-182 [doi]
• 10.8 COBI: A Degree-of-56 Column-Bipartite Densely Connected Digital Ising Chip with 8b Spin CoefficientsYihao Wu, Jooyoung Bae, Seunghun Shin, Bongjin Kim. 182-184 [doi]
• SharpSAT: A Heuristic-Learning-Based SAT Accelerator Achieving 0.8μs/16.1μs Solution Time in SAT/UNSAT CasesYi Huang 0036, Hao Kong, Iris Ying Chou, Bin Wang, Xiangyu Kong, Jianfeng Zhu 0001, Liangwei Li, Xiao Li, Hanning Wang, Aoyang Zhang, Leibo Liu. 184-186 [doi]
• PCIM-SAT: A 55nm Probabilistic K-SAT Solver with p-Bit-Based Parallel-Variable Update on a Mixed-Signal Compute-in-Memory ArchitectureTinish Bhattacharya, George Higgins Hutchinson, Dongseok Kwon, Dmitri B. Strukov. 186-188 [doi]
• 11.1 A 14b 400MS/s TDC-Assisted Pipelined-SAR ADC with Rail-to-Rail Input VTC and Background Time-Domain Error CalibrationJingpeng Wang, Bingrui Li, Haoyang Luo, Mingtao Zhan, Xiyu He, Dawei Shen, Lu Jie 0001, Xiyuan Tang. 190-192 [doi]
• A 28nm CMOS SAR-Based Continuous-Time Pipeline ADC with 103dB SFDR and 270MHz Bandwidth Using NCF and DAC Error CalibrationQilong Liu, Robert Rutten, Muhammed Bolatkale, Arda Aralioglu, Gilbert Hardeman, Emil Siby, Patrick van Mourik, Vinoth Ilamurugan, Shagun Bajoria, Lucien J. Breems. 192-194 [doi]
• 11.3 A 500MS/s 12b Pipe-SAR ADC Using a Triple-Cascode FIA with Virtual Supply ExtensionMichele Rocco, Gabriele Zanoletti, Alessia Ceroni, Giacomo Tombolan, Gabriele Bè, Luca Ricci, Salvatore Levantino, Andrea Leonardo Lacaita, Luca Bertulessi, Carlo Samori, Andrea Giovanni Bonfanti. 194-196 [doi]
• A 13b 500MS/s 94dB-SFDR Resistive-Input Pipelined-SAR ADC with Linear and Efficient Current-Buffer-Based Integrating SamplerXiyu He, Mingyang Gu, Yunsong Tao, Siyu Huang, Zhishuai Zhang, Yi Zhong, Nan Sun 0001, Lu Jie 0001. 196-198 [doi]
• 11.5 A Compact 7b 175GS/s Linearized Time-Interleaved Slope ADC with Switched Input BuffersEwout Martens, Angelo Parisi, Anirudh Kankuppe, Adam Cooman, Hanyue Li, Steven Van Winckel, Pratap Tumkur Renukaswamy, Lucas Moura Santana, Jorge Lagos 0001, Nereo Markulic, Jan Craninckx. 198-200 [doi]
• 11.6 an 8B 20Gs/S Time-Interleaved ADC with 2.6mW 1GS/s Hybrid Voltage/Time-Domain Sub-ADC in 12Nm FinFETDaisuke Miyazaki, Yuki Yagishita, Mika Takasaki, Shun Nagata, Takeru Nogamida, Yudai Abe, Kazutoshi Tomita, Kazunori Hasebe, Toshiyuki Kikkawa, Satoshi Yoshizawa, Atsuya Suzuki, Soichi Kato, Takahiro Naito, Keigo Bunsen, Tomohiro Matsumoto, Yasushi Katayama. 200-202 [doi]
• A 12b 12GS/s Two-Way Interleaved Pipeline ADC with Integrated Broadband RF VGA in 5nmHaiyang Zhu, Larry Singer, Ron Kapusta, Dan Kelly, Tao Pan, Mike Hensley, Scott Bardsley, Christopher Dillon, Daniel Rey-Losada, Kashif M. Sheikh, Chen-Kai Hsu, Zhao Li, Janet Brunsilius, Enrique Alvarez-Fontecilla, Robert Bishop, Paul Wilkins, Hassan L'Bahy, Adalberto Cantoni, Nuo Zhang, Kaung Myat San Oo, Cihan Asci. 202-204 [doi]
• 11.8 A 14b 20GS/s RF-Sampling DAC Achieving 70.4dBc IMD3 Up to 8.9GHzHao Luo, Zhijun Long, Wentao Zhu, Haowei Lu, Yushen Fu, Mingqian Lei, Cheng Wang, Xiaoge Zhu, Yumei Diao, Haipeng Zhu, Jiajun Zhong, Li Tian, Yi Yang, Xinli Geng, Keqing Ouyang. 204-206 [doi]
• 12.1 A 74fs-Jitter, -59dBc-Spur Fractional-N DPLL Using a Supply-Resilient Time-Amplifying Dual-Ramp DTCRishabh Gurbaxani, Cicero S. Vaucher, Masoud Babaie. 208-210 [doi]
• A -66dBc-Worst-Fractional-Spur and 58fs-Jitter Fractional-N Digital PLL Using a Supply-Resilient Pseudo-Differential Inverse-Constant-Slope DTCPietro Salvi, Michele Rossoni, Riccardo Moleri, Daniele Lodi Rizzini, Damiano Fagotti, Stefano Gallucci, Andrea Leonardo Lacaita, Simone Mattia Dartizio, Salvatore Levantino. 212-214 [doi]
• 12.4 A 21.6fsrms-Jitter, -260.7dB-FoM Fractional-N PLL Enabled by an Intrinsically Linear Variable-Slope SPD for Quantization-Error CancellationYanchao Liu, Yang Liu 0003, Kaihang Wang, Xiaohua Yu, Ronghua Ni. 214-216 [doi]
• A 14GHz Chopper-Refolding Sampling PLL Achieving 33.8$\text{fs}_{\text{rms}}$ and 80.8dBc Reference Spur with a kT/C-Noise-Cancellation SPDYichen Liu, Jian Zhang 0085, Xiaosen Liu, Yan Wang 0023. 216-218 [doi]
• A 0.65-to-1V-VDD 10.5-to-11.85GHz Fractional-N Sampling PLL Achieving 71.47fs Integrated Jitter and <-60dBc Near-Integer Fractional Spur in 40nm CMOSYixi Li, Junjie Chen, Xinyu Shen, Jie Yang 0033, Jian Liu 0021, Nanjian Wu, Zhao Zhang 0004, Liyuan Liu. 218-220 [doi]
• A 7.15-to-7.95GHz Magnetically Enhanced Feedforward Waveform-Shaping CMOS Oscillator with Implicit Common-Mode Noise Cancellation Achieving -146.72 dBc/Hz PN@1MHz and 190.6dBc/Hz FoMRui Ma 0003, Wei Deng 0001, Haikun Jia, Juntao Lan, Zhihua Wang 0001, Baoyong Chi. 220-222 [doi]
• A 5.7mW@0.55V-to-50mW@0.9V Deeply Power-Scalable Reconfigurable Series-Resonance/Class-F VCO with Mutual-Inductance Self-Cancellation and Hybrid 8-Shaped Coupling TechniquesJuntao Lan, Wei Deng 0001, Haikun Jia, Shiwei Zhang, Zhihua Wang 0001, Baoyong Chi. 222-224 [doi]
• 12.9 A 10.2-to-16.2GHz Dual-Mode-Transformer-Based Wideband Series-Resonance VCO Achieving >201.1dBc/Hz FoMT at a 10MHz OffsetYang Li, Yanchao Liu, Kaihang Wang, Dong Pu, Xiaohua Yu, Ronghua Ni. 224-226 [doi]
• 13.1 HYDAR: A 390K QPS, 1574K QPS/W Hybrid Analog/Digital Compute-in-RRAM Accelerator for Efficient Recommendation SystemJiaming Li 0006, Peng Yao, Xueqi Li, Zhenqi Hao, Dabin Wu, Zhouzheng Li, Haishu Xianyu, Lin Li, Shujuan You, Taiwei Chiu, Maojia Sheng, Wei Yang, Qingtian Zhang, Jianshi Tang, He Qian, Bin Gao 0006, Huaqiang Wu. 228-230 [doi]
• Medusa: A Quantum-Inspired 200-Variable 1016-Clause Analog k-SAT SolverLuke Wormald, Ying-Tuan Hsu, Evangelos Dikopoulos, Wei Tang 0010, Benjamin Datsko, Ali Hammoud, Zhengya Zhang, Michael P. Flynn. 232-234 [doi]
• 13.4 An Inverse-Designed Passively Coupled N-Path Filter with gm-Boosted Active HBT SwitchesVinay Chenna, Hossein Hashemi 0001. 234-236 [doi]
• A Nonintuitively Frequency-Staggered Wideband mm-Wave Low-Noise AmplifierVinay Chenna, Hossein Hashemi 0001. 236-238 [doi]
• 14.2 An $8\lambda\times 38\text{Gb}/\mathrm{s}/\lambda$ 106fJ/b Optical WDM Transmitter in 45nm CMOS SOIAmirreza Shoobi, Kaisarbek Omirzakhov, Zhehao Yu, Ali Pirmoradi, Firooz Aflatouni. 242-244 [doi]
• A Single-Chip Laser Diode Driver with Built-In Frequency-Sweep Linearization for FMCW LiDARWenshuo Zhu, Jianqiang Jiang, Xuan Sun, Zhenhao Li, Tingyi Gu, Xin Zhang, Cheng Huang. 244-246 [doi]
• Highly-Integrated Light-Sensing System with RF Harvesting and Transmission in Commercial N-Type IGZO Flexible TechnologyMarco Privitera, Muhammad Zahid Naveed, Andrea Ballo, Gianluca Giustolisi, Alfio Dario Grasso, Massimo Alioto. 248-250 [doi]
• Self-Programmable Twin PUFs via Photovoltaic Energy Harvesting During the Pre-Wafer-Dicing StageEunseok Lee 0002, Jaehong Jung, Maitreyi Ashok, Anantha P. Chandrakasan, Ruonan Han 0001. 250-252 [doi]
• 2 Bit Density and >85MB/s Write ThroughputJayanth M. Thimmaiah, Ryuji Yamashita, In-Soo Yoon, Jason Li 0001, Cynthia Hsu, Takuya Ariki, Naoki Ookuma, Yosuke Kato, Koichiro Hayashi, Kazuki Yamauchi, Indra K. V, Masahiro Kano, Sirisha Bhamidipati, Sneha Bhatia, Seema Malhotra, Naoki Ojima, Ella Wu, Zhiyong Yang, Frank W. Tsai, Mathias Bayle, Naoyuki Minami, Yasuyuki Fujihara, Kei Kitamura, Tomofumi Kitani, Takuyo Kodama, Takaya Handa, Naoaki Kanagawa, Yuki Ishizaki, Susumu Fujimura, Yoshinao Suzuki, Mario Sako, Yumi Higashi, Yoshihisa Watanabe, Toshiyuki Kouchi, Aravinth V, Chin-Yi Chen, Xiang Yang, Guirong Liang, Jenny Wang. 254-256 [doi]
• 15.2 A 350mV Single-Rail SRAM Using a Custom-Logic-Bitcell in 2nm-CMOS-Nanosheet Technology for Mobile and Edge-AI ApplicationsManish Trivedi, Sandipan Sinha, Ramesh Halli, Girishankar Gurumurthy, Jaswinder Singh, Chun-Yuan Cheng, Linchien Chen, Jeff Lin, Hugh Mair. 256-258 [doi]
• 2 DensityHyunjin Shin, Gyuseong Kang, Yeseul Kim, Dohui Kim, Kyuseong Kim, Sunkyu Lee, Hangil Lee, Sanggyeong Won, Mijoung Kim, Jaeho Lee, Seungpil Ko, Jaechul Shim, Shinhee Han, Kiseok Suh, Sohee Hwang, HyunChang Lee, Jonghoon Jung, Sanghoon Baek. 258-260 [doi]
• 2 Bit-Cell, Dual-Port Access, and 51.2Gb/s Read Throughput for Automotive and Edge AI ApplicationsPo-Hao Lee, Chia-Fu Lee, Hon-Jarn Lin, Cheng-Han Lu, Yen-An Chang, Pranata W. Sanjaya, Chia-Jung Tsen, Kuan-Chun Chen, Ming-Chieh Lin, Chao-Jung Hung, Tan-Li Chou, Chih-Hui Weng, Chia-Yu Wang, J.-J. Wu, Harry Chuang, Yih Wang, Yu-Der Chih, Tsung-Yung Jonathan Chang. 260-262 [doi]
• 2 Configurable TCAM with Macro-Wise Pipelined Search Methods for Automotive ApplicationsShunya Nagata, Yohei Sawada, Kenichiro Takiguchi, Masao Morimoto, Shinji Tanaka, Naoya Fujita, Tomohiro Miura, Daisuke Nakamura, Takashi Ito. 262-264 [doi]
• 15.6 A 36GB 3.3TB/S HBM4 DRAM with Per-Channel TSV RDQS Auto Calibration and Fully-Programmable MBISTSunghwan Joo, Jinyeon Kim, Yongsun Lee, Ji-Young Kim, Youngsik Lee, Yong-Min Kim, Chi Sung Oh, Kyu-Ha Shim, Haesuk Lee, Young-Yong Byun, Changhyun Bae, Joohwan Kim, Je-Min Ryu, Shin-Haeng Kang, Jaehoon Lee 0005, Young-Uk Chang, Jaekyung Lee, Jong Tae Hwang, Daehwan Seo, Ki-Heon Na, Young Guen Song, Daihyun Lim, Kyung-Soo Ha, Young-Soo Sohn, Sangjoon Hwang 0001. 264-266 [doi]
• A 1cnm 14.4Gb/s/pin 16Gb LPDDR6 SDRAM with Efficiency Mode, LDO-Based WCK Tree, Dynamic Write NT-ODT, Fast CS Control and System Meta ModeJungtaek You, Mino Kim, Dae-Han Kwon, SangSic Yoon, Joonhong Park, Hyungrok Do, Jeongje Park, Yooseok Jung, Seongseop Lee, Kyuyoung Kim, Hyeongsoo Jeong, Jaeyeol Kang, Hanbyeol Kwon, Minwook Oh, Jieun Kim, Jinseok Oh, Gi-Moon Hong, Dongyoon Ka, Seungho Lee, Heewoong Song, Minchang Kim, Daeho Yun, Sooncheol Kwon, Dongbeom Lee, Taekyun Shin, Jongmyeong Lee, Jungmin Yoon, Kyeong Pil Kang, Sanghyuk Heo, Dongkyun Kim, Jieun Jang, Hyungsoo Kim. 266-268 [doi]
• A 16Gb 12.8Gb/s LPDDR6 SDRAM with 12-DQ/Sub-Channel Wide NRZ Signaling and Enhanced Reliability by Per-Row Activation Counting and Meta-Data SchemeKiheung Kim, Hong-Joo Song, Youngdo Um, Jinhun Jang, Seungjun Lee, Ho-Seok Seol, Hye-Jung Kwon, Ji-Hwan Seol, Hoon Shin, Jaehyung Lee, JongMoon Choi, Sung-Woo Yoon, Sang Yun Kim, Dongkeon Lee, Minsoo Jang, Daehyun Kwon, Sangyong Lee, Jinguk Kim, Jonghyuk Kim, in Jung, Taeha Song, Chang Won Kim, Seung-Ho Baek, Jinyong Choi, Young Hun Seo, Won Ho Choi, Changsik Yoo, Sangjoon Hwang 0001. 268-270 [doi]
• 15.9 A 48Gb/s 24Gb GDDR7 DRAM for Mid-Range Inference AI with Symmetric 2CH-Mode Operation, Clock-Path Optimization, and RAS FeaturesHyunsu Park, Sungkwon Lee, Kyunghoon Kim, Jin-Youp Cha, Hyeongjun Ko, Jaehyeok Yang, Seongjin Kim, Youngtaek Kim, Minsoo Park, Gangsik Lee, Keonho Lee, Sanghoon Lee, Jiseok Lee, Gyunam Jeon, Sera Jeong, Yongsuk Joo, Jaehoon Cha, Seonwoo Hwang, Seulgi Kim, Eunji Song, Junghwan Ji, Byungjun Kang, Boram Kim, Sang-Yeon Byeon, Hankyu Chi, Hyungsoo Kim, Jonghwan Kim. 270-272 [doi]
• 2 DRAM with Cell-on-Peripheral Architecture Using Wafer-to-Wafer Hybrid Copper BondingHyunchul Yoon, Youngseok Park, Tae-Jin Park, Suk Lae Kim, Seungjae Jung, Daesun Kim, Kyunghwan Kim, Yongjun Kim, Kyuchang Kang, Bokyeon Won, Sang-Hoon Jung, Seunghan Woo, Donggeon Kim, Jonghyuk Kim, in Jung, Junsoo Kim, Jae-Joon Song, Incheol Nam, Young Hun Seo, Sungsoo Yim, Jemin Park, Changsik Yoo, Sangjoon Hwang 0001. 272-274 [doi]
• 16.1 PV Energy-Harvesting Interface Using Reconfigurable Self-Clamp CSCR Converter Achieving 3.83× High-Efficiency VCR Ratio and Open-Voltage-Sense-Free MPPTZiyang Zhong, Rui Paulo Martins, Mo Huang. 276-278 [doi]
• 16.2 A Bias-Flip-Based Piezoelectric Energy Harvesting Interface with a Digital Track-and-Lock MPPT Achieving Sampling-Free Operation and 99.8% MPPT EfficiencyRui Zhang, Chuhui Wang, Zhongxin Ye, Ka Nang Leung, Jianping Guo 0004. 278-280 [doi]
• A Fully Integrated Piezoelectric Energy-Harvesting Interface with Single-Stage Bias-Flip and MPPT Achieving $\mathbf{5. 6 3} \boldsymbol{\times}$ Maximum Output Power Improving RateXiaonan wu, Jinyi Yuan, Minghao Shang, Baochuang Wang, Sijun Du, Lin Cheng 0001. 280-282 [doi]
• 16.4 A One-Stage Bidirectional Rectifier with Pre-Charge-Based MPPT for Triboelectric Energy Harvesting with 93% MPPT Efficiency and 8.86× Power EnhancementWenyu Peng, Jida Peng, Willem D. van Driel, Guoqi Zhang, Sijun Du. 282-284 [doi]
• A Single-Inductor Multi-Channel Thermoelectric Energy Harvesting Interface Realizing Uneven Temperature MPPT with 39.6% Efficiency Enhancement and 62mV Tapped-Inductor-Oscillator-Based Start-UpYunzhe Yang, Sijun Du. 284-286 [doi]
• 16.6 A Parameter-Free Runtime-Energy-Loss Optimizer Achieving 2.15% Error in Energy-Recycling Duty-Cycled SystemsJianxin Yang, Rui Paulo Martins, Mo Huang. 286-288 [doi]
• A 90.7%-Efficiency Piezoelectric Resonator-Based Sigma Converter with 6-Phase 2-DoF on-Chip Regulation and Zero-Standby Sigma Mode for Transient and Output Power EnhancementShunmin Jiang, Tiansu Wang, Patrick P. Mercier, Sijun Du. 288-290 [doi]
• 16.8 A Battery Charger Based On Mesh-Connection 2×CF Continuously-Scalable-Conversion-Ratio Converter Achieving $\mathbf{3. 2 W} / \mathbf{m m}^{\mathbf{3}}$ Power DensityYuanfei Wang, Zhiyuan Zhang, Yihan Zhang, Rui P. Martins, Mo Huang. 290-292 [doi]
• 16.9 A 96.6% Single-Mode Hybrid Dual-Path Buck-Boost Converter with Conduction Loss Reduction through Conversion-Ratio-Based Adaptive 3-Phase ControlMinsu Kim, Yunho Lee, Hyunjun Park, Hongseok Kim, Woojoong Jung, Minwoo Kim, Junhyun Bae, Hyoung-Seok Oh, Hwayeal Yu, Hyung-Min Lee. 292-294 [doi]
• Fully Integrated Mm-Scale 5G RF MIMO Harvester with -40dBm Sensitivity and Spatial MPPT via Hybrid Transformer-Based Combining/ShiftingAndrea Ballo, Ruiyuan Yang, Karim Ali 0007, Massimo Bruno Alioto. 294-296 [doi]
• 17.1 NVIDIA GB10: SoC Built for AI AccelerationA. Skende, G. Rosseel, Nathaniel Ross Pinckney. 298-300 [doi]
• 17.2 the STM32N6 Microcontroller: Enabling Intelligent Edge AI for IoT and BeyondGiuseppe Desoli, Jean-François Agaësse, Nitin Chawla, E. Hilkens, Thomas Boesch, Valentin Taufour, Manuj Ayodhyawasi, P. Ravenhill, Surinder-pal Singh, M. Soulie. 300-302 [doi]
• 17.3 ARIES and REGULUS: A Unified and Scalable hardware-software co-designed NPU SoC Family for On-Device and On-Premises Multimodal InferenceD. Shin, H. Yang, S. Jeon, J. Park, S. Han, J. Park, J. Lee, J. Kim, H. Kim, Y. Oh, M. Kim, C. Jung, W. Kim, S. Kim, H. Jeong, G. Kim, K. Lee, G. Song, Y. Min, C. Song, A. Kanybek, Y. Jung, J. Song, S. Cho, H. Na, J. Park, D. Si, B. Lee, B. Park, H. Jeon. 302-304 [doi]
• 17.4 Maia: A Reticle-Scale AI AcceleratorS. Xu, G. Mandal, S. Jahagirdar, S. Tripathy, P. Parthasarathy, S. Srinivasan, A. Levin. 304-305 [doi]
• 18.2 A 22nm 1.87ms/Frame Streaming Multi-Speaker ASR Accelerator Leveraging Contextual-Aware Redundancy Skipping with 2D-Writable Microscaling Compute-in-Memory and Similarity-Aware TCAM DesignWenjie Ren, Mingxuan Li, Zhenghao Jin, Yifan Ding, Ruohuang Xu, Xiangjun Ye, Yufei Ma 0002, Tianyu Jia, Le Ye. 310-312 [doi]
• SMoLPU: 122.1µJ/Token Sparse MoE-Based Speculative Decoding Language Processing Unit with Adaptive-Offload NPU-CIM CoreSangwoo Ha, Jingu Lee, Youngjin Moon, Sunjoo Whang, Wooyoung Jo, Gwangtae Park, Sangjin Kim, Soyeon Um, Junha Ryu, Yurim Jo, Hoi-Jun Yoo. 312-314 [doi]
• SpikeRAM: A 48.1pW/Synapse/Bit Event-Driven Spiking Compute-Near/In-Memory Processor with Neuromorphic Sensor Enabling Life-Long On-Chip LearningHaotian Fu, Yue Zhou 0010, Zhuo Zhang, Hongzhao Zheng, Renxu Yang, Yulong Huang 0001, Dezhen Yang, Yannan Xing, Tugba Demirci, Ning Qiao, Bojun Cheng. 314-316 [doi]
• A 28nm 47.3TFLOPs/W 894mJ/Inference Visual Autoregressive Accelerator with Differential-Amplifier Speculation and Chain-Reaction-Like Parallel GenerationZhiheng Yue, Xujiang Xiang, Jiamu Fu, Shaojun Wei, Yang Wang 0089, Yang Hu 0001, Shouyi Yin. 316-318 [doi]
• 19.1 Piggybacked SC-on-CSCR: A Modular On-Chip Switched-Capacitor Converter for 12-to-60V Input 1.8-to-5V Output Achieving 5.67mW/mm2 Power Density and 71.5% Peak EfficiencyYunzhe Yang, Xin Zhang, Sijun Du. 320-322 [doi]
• 19.2 A Three-Mode Single-Inductor Four-Quadrant Converter Achieving 94.6% Peak Efficiency with Seamless Zero-CrossingPeng Cao, Jiawei Xu 0001, Zhiliang Hong 0001. 322-324 [doi]
• A Hybrid Bipolar-Output Isolated Converter with +15V/-5V Outputs for SiC Gate DriversJoo-Mi Cho, Jeong Hun Kim, Yong-Chan Lee, Sung-Wan Hong. 322-324 [doi]
• A 94.8%-Peak-Efficiency Double Step-Up SIBO Converter Achieving 88% Output Ripple Reduction for AMOLED DisplayHyeon-Ji Choi, Joo-Mi Cho, Sang-Yun Nam, Sung-Wan Hong. 324-326 [doi]
• 19.4 A Digital-Feedback Active-Gate-Driver IC for 600A 1200V SiC MOSFETs Supporting High-and Low-Side Drive with Simultaneous ${\text{dV}}_{\text{ds}}$/dt Control and ${\mathrm{V}}_{\text{ds}}$ Surge Suppression Enabled by Miller Capacitance CalibrationShusuke Kawai, Kohei Horii, Koutaro Miyazaki, Yuto Bushimata, Satoshi Takaya, Hiroaki Ishihara. 326-328 [doi]
• 19.6 A 68%-Peak-Efficiency Single-Transformer Multi-Output Isolated DC-DC Converter with a Regulated Negative RailQi'ao Huang, Dongfang Pan, Weiwei Xu 0007, Yongle Zhang, Lin Cheng 0001. 330-332 [doi]
• 2 Transformer Power DensityKishalay Datta, Yue Wu, Charles Sullivan, Jason T. Stauth. 334-336 [doi]
• 19.9 A 2.15W 120V/230Vac to 5-to-12Vdc Offline Power Converter with Full-Duty-Cycle Input-Series Dual-Branch Converter Achieving 1088mW/${\text{cm}}^{3}$ and 87.2% Peak EfficiencyGang Liu, Junmin Jiang, Sijun Du, Xun Liu. 336-338 [doi]
• 20.1 An Ultra-Compact Asymmetrically Load-Pulled Series Doherty Power Amplifier in 22Nm FDSOI CMOS with 25.3dBm Psat and 29.7% PAE6dB for Ku-Band 6G FR3Jinglong Xu, Tzu-Yuan Huang, Mohamed Eleraky, Islam Tolaib, Hua Wang 0006. 340-342 [doi]
• A High Back-Off Efficiency Unequal-Stacked Doherty Power Amplifier Achieving 16.7dBm Pavg in a 22nm FDSOI CMOS Technology for 5G FR2 ApplicationsSeungwon Park, Jooseok Lee, Seungjae Baek, Taewan Kim, Yifei Chen, Sehyug Jeon, Sung-Gi Yang. 342-344 [doi]
• A mm-Wave Doherty Power Amplifier in a Single-Path Footprint Using Compact Reciprocal Doherty NetworksLianbo Liu, Yidong Fang, Qiang Zhou, Taiyun Chi, Sensen Li. 344-346 [doi]
• 20.4 An Ultra-Compact, Inherently Resilient FR3 Source-Follower Power Amplifier with 4:1 VSWR Resilience and RIMD Immunity for Large-Scale SATCOM and 6G Phased ArraysMohamed Eleraky, Jianping Zeng, Hua Wang 0006. 346-348 [doi]
• 20.5 A 24-to-27.5GHz Self-Adaptive Load-Modulated Balanced Amplifier for Integrated Communication, Sensing, and Power Transfer ScenariosLuqi Yu, Peng Chen, Yucheng Yu, Gaojing Zhang, Xiaoyu Lu, Xiang Zhang 0021, Jixin Chen, Xiaowei Zhu 0002, Chao Yu 0002, Wei Hong 0002. 348-350 [doi]
• 20.6 A 330-to-344GHz GaN Power Amplifier with Maximum-Available-Gain-Boosting Technique and Compact Tandem Coupler Achieving 86mW Output Power at 340GHzWeibo Wang, Wenhua Chen, Kenan Xie, Chenjie Luo, Yibin Zhang, Dechun Shang, Ziwei Jiang, Guodong Yu, Yan Chen, Keping Wang. 350-352 [doi]
• 20.7 An Ultra-Compact D-Band Transceiver Front-End Based on a Common-Gate Bidirectional Amplifier Achieving 11.2dBm TX $P_{\text{sat }}$ and 8.2dB RX Average NF for an Area-Constrained 2D Beamformer AiPSyed Mohammad Ashab Uddin, Wooram Lee. 352-354 [doi]
• A 16-to-256QAM G-Band Subharmonic Phase-Modulating Transmitter for Beyond-5G CommunicationsJia Zhou, Jieqiong Du, Chao-Jen Tien, Jhih-wei Chen, Ruei-Chen Soong, Francisco Cardenas Beltran, Lachlan Cuskelly, Christopher Chen, Minji Zhu, Adrian Tang 0002, Sai-Wang Tam, Mau-Chung Frank Chang. 354-356 [doi]
• 20.9 A Compact 26/38GHz-Reconfigurable Dual-Band Low-Noise Amplifier Using Transformer-Based Pole-Zero-Inversion Image-Rejection Technique Achieving >39/41dB IRR for 5G Multi-Band ApplicationsJiaming Luo, Jincai Wen, Yuxia Wu, Xu Wang, Lingling Sun. 356-358 [doi]
• 20.10 A 214-to-242GHz Miniaturized Co-Packaged PA-Antenna Array with 29dBm Lens-Less Eirp in a 0.13μm SiGe ProcessQianqi Meng, Zhihua Wang, Peigen Zhou, Dawei Tang, Siyuan Tang, Junyue Xiao, Rui Zhou 0016, Jinben Li, Zhe Chen 0021, Jixin Chen, Hao Gao 0001, Wei Hong 0002. 358-360 [doi]
• 20.11 A 215GHz 8×8 Radiator-Oscillator Array with Robust Coupling Achieving 25.5dBm EIRP and 12.9% FTRAhmed Elmenshawi, Sriram Muralidharan, Mona Mostafa Hella. 360-362 [doi]
• 21.1 Sub-1mV-Accuracy, 24-CH Synchronous Battery Monitoring IC with Bipolar-Sampling ADCs and Calibration EnginesJeongwon Han, Sunsik Woo, Kwang-Seok Oh, Donghyeon Kim, Youngwoon Ko, Won-Jong Choi, Seungjun Han, Kyungdam Park, Juncheol Choi, Jinseop Lee, Jinyong Jeon, Young-Suk Son, Sang-Gug Lee, Kyeongha Kwon. 364-366 [doi]
• A Fully Integrated GMR Biosensor with On-Chip Coils and Sensors Achieving 605 Resolution FoM for Multiplexed PoC DiagnosticsMengze Wu, Remy Lassalle-Balier, Pablo Aguirre, Florencia Ferrer, Sina Haji Alizad, Shekher Kummari, Alex Latham, Drew A. Hall. 366-368 [doi]
• 21.3 A Temperature- and Aging-Compensated TMR Current Sensor with ±0.13% Sensitivity Variation from -40°C to 120°CTianxiang Qu, Nan Wang, Kaiwen Zhou 0004, Jiayao Liu, Longxi Xiang, Mingqian Sun, Zhiliang Hong 0001, Xiaoyang Zeng, Jiawei Xu 0001. 368-370 [doi]
• 21.4 A Background-Calibrated NPN-Based Temperature Sensor with 0.05°C ($3 \sigma$) Inaccuracy from -70°C to 125°CNandor G. Toth, Kofi A. A. Makinwa. 370-372 [doi]
• 2-Accuracy FoM in 2nm Gate-All-Around ProcessHaejung Choi, Jooseong Kim, Woojoong Jung, Sungmin Yoo, Jun Hyeok Yang, Sunghyuck Lee, Jihye Park, Michael Choi, Ben Rhew. 372-374 [doi]
• A Battery-Free Wireless Electrochemical-Interface SoC Featuring 143dB Dynamic Range for Multimodal WearablesWeixiao Wang, Yili Shen, Tianyi Cai, Qijing Xiao, Yuxuan Luo 0001, Bo Zhao 0003. 376-378 [doi]
• 21.8 A CMOS Hybrid Common-Gate Current-Integrating Sampler with <37dB SNDR Across 51GHz BW in a 128GS/s Front-EndJun Dai, Yi Zhong, Yunsong Tao, Aodong Zhang, Mingtao Zhan, Hao Zhang, Lu Jie 0001, Nan Sun 0001. 378-380 [doi]
• 21.9 A -82.3dB THD+N 60V Fully Integrated Shunt-Resistor-Based In-Line Current Sensor with DLL-Assisted Dynamic Body-Biasing TechniqueHeng Ma, Huajun Zhang 0001, Qinwen Fan. 380-382 [doi]
• 22.2 A 16-Channel Low-Power Cryo-CMOS Flux Control Pulse Generator ASIC in 14nm FinFET TechnologyKevin Tien, David J. Frank, John F. Bulzacchelli, Pat Rosno, Daniel Moertl, John Timmerwilke, Ari Noori, Devin Underwood, Ken Inoue, Subhajit Ray, Daniel Ramirez, Timothy J. Schmerbeck, Bryce Snell, Jeremy Ekman, Ryan Black, Mark Yeck, Tom Haselhorst, Emma Erickson, Kevin Demsky, Christian W. Baks, Jonathan Kaus, Andrea Ruffino, Pier Andrea Francese, Andy Davies, Sudipto Chakraborty, Scott Lekuch, Brian P. Gaucher, Bodhisatwa Sadhu, Scott Willenborg, Daniel J. Friedman. 386-388 [doi]
• 22.3 A Multi-Qubit Cryo-CMOS SoC with Polar-Based Electron-Spin and PDM-Based Nuclear-Spin Controllers for Color Centers in DiamondNiels Fakkel, Luc Enthoven, Mohamed Abdelrahman Elbadry, Hendrik Benjamin van Ommen, Margriet van Riggelen, Jiwon Yun, Tim Taminiau, Fabio Sebastiano, Masoud Babaie. 388-390 [doi]
• A Radiation-Hardened Self-Healing CMOS Imager with Online Pixel/Logic Annealing and Tile-Adaptive Compression for Space ApplicationsQuan Cheng, Zhengke Yang, Haoyuan Li, Qiufeng Li, Zhen Kong, Gaoqiang Niu, Yuan Liang 0004, Jiamin Li, Jerald Yoo, Masanori Hashimoto, Longyang Lin. 390-392 [doi]
• A 500kGy Radiation-Hardened 2.4GHz Wi-Fi Receiver for Innovative Nuclear Power Plant DecommissioningYasuto Narukiyo, Sena Kato, Kotaro Yanaka, Yuya Takahashi, Masaya Miyahara, Jill C. Mayeda, Atsushi Shirane. 392-394 [doi]
• A 32 Gb/s/λ 256Gb/S/Fiber Half-Rate Bandpass-Filtered Clock-Forwarding DWDM Optical Link in a 3D-Stacked 7nm EIC/65nm PIC TechnologySanquan Song, Nandish Mehta, Nikola Nedovic, Angad Rekhi, Georgios Kalogerakis, Li Xu, Brian Zimmer, Stephen G. Tell, Yoshinori Nishi, Xi Chen, Ward Lopes, Benjamin G. Lee, Thomas H. Greer, C. Thomas Gray. 396-398 [doi]
• 23.2 A 2-Channel 800Gb/s Transceiver for Coherent-Lite Applications with <300ns Latency in 5nm FinFETMarco Sosio, Claudio Nani, Enrico Monaco, Nicola Ghittori, Domenico Albano, Alessio Di Pasquo, Alessandro Bosi, Travis Lovitt, Gabriele Gira, Fulvio Martinelli, Victor Karam, Devrishi Khanna, Mehdi N. Khiarak, Sasan Cyrusian, Mehdi Davoodi, Marco Garampazzi, Nimesh N. Miral, Fabio Giunco, Ivan Fabiano, Nicola Codega, Claudio Asero, Leonardo Daniel Herbas Burgos, Enrico Temporiti, Shawn Scouten, Kishore Kota, Yang Fu, Ruibin Jin, Josef Mueller, Michael Leung, Arash Farhoodfar, Stephen Jantzi, Ken Chang. 398-400 [doi]
• A 2×500Gb/s Monolithic Silicon-Photonic DWDM PAM-4 Transceiver in 45nm CMOS SOIZiang Xu, Yalong Lin, Jinxuan Jin, Zhenkai Ye, Dacheng Xu, Aolin Xu, Chaodi Sheng, Binwen Hong, Xiaojun Bi. 400-402 [doi]
• 23.4 A 6.4Tb/s 4.2pJ/b Co-Packaged Optics ASIC with Direct-Drive Integrated TIA and Retimed Segmented Mach-Zehnder Modulator Driver in 7nm FinFETMahdi Kashmiri, Ajay Yadav, Jin Namkoong, Behrooz Nakhkoob, Tony Kao, Shen Shen, Vaibhav Pandey, Kuan-Chang Chen, Jinho Han, Sudheer Gaddam, Shayan Kazemkhani, Sang-Young Kim, Simar Maangat, Bo Nguyen, Mike Robinson, Hiva Hedayati. 402-404 [doi]
• 23.6 A 112Gb/s NRZ Heterodyne Detection 23ns Settled Burst-Mode RX with CD Suppression and Envelope Demodulation for 100G PONCheng Wang, Ye Gu, Gertjan Coudyzer, Shengpu Niu, Jing Zhang, Xin Yin. 406-408 [doi]
• A 4042-PPI 10b 240Hz Digital-PWM CMOS Backplane for Micro-Led-on-Silicon Displays with a Shared, Unified Memory-in-Pixel ArchitectureKihyun Kim, Jun-Gi Lee, Hyun-Sik Kim. 412-414 [doi]
• A 144mW 161Mpixels/s Tensor Display Processor for 3D Virtual RealityChing-Yen Lee, Yueh-Feng Tsai, Ying-Sheng Lin, Chia-Hsiang Yang. 414-416 [doi]
• A 10b Display Driver IC with a Pivoting Translinear-Loop DAC-in-Buffer Enabling $1\mu\mathrm{s}1-\mathrm{H}$ Scan Time and $1722\mu\mathrm{m}^{2}$ Per ChannelHyeong Joon Kim, Yousung Park, Kihyun Kim, Seunghwa Shin, Hyun-Sik Kim. 418-420 [doi]
• 24.6 A Touch-Embedded OLED Display-Driver IC with Display Noise Referencing and Display Coupling Noise Prediction Based on Dedicated Neural Networks for Mobile Applications with CoE DisplayYun-Rae Jo, Sewhan Na, San-Ho Byun, Junchul Park, Gyeongmin Ha, Jiheon Ok, Tae-Gyun Song, Woo-Nyoung Lee, Jihyun Lee, Hyun-Wook Lim, Siwoo Kim, Jae-Youl Lee. 420-422 [doi]
• HERACLES: 8192-Way SIMD Programmable Scalable Fully-Homomorphic Encryption SoC for Privacy-Preserving Cloud Computing in Intel 3 CMOSAnupam Golder, Raghavan Kumar, Sachin Taneja, Kylan Race, Paolo A. Aseron, James Greensky, Wen Wang 0007, Huijing Gong, Lalith Kethareswaran, Vikram B. Suresh, Adish Vartak, AppaRao Challagundla, Jeremy Casas, Poornima Lalwaney, Duhyeong Kim, Christopher N. Gutierrez, Ernesto Zamora Ramos, Wonhee Cho, Jose M. Rojas Chaves, Michael Steiner 0001, Dan Lake, Nataraj Yennampelli, Karthik Nivarthi, Kamalakanth Bijinapally, Bala Prasad Talamala, Sravanth Valluri, Vasantha Srirambhatla, Chris Wilkerson, Rosario Cammarota, Sanu Mathew. 424-426 [doi]
• 25.2 A 28nm 0.48mJ/boot Torus FHE Processor for Arbitrary Computation on Encrypted DataXinglong Yu, Yi Sun, Yifan Zhao 0007, Honglin Kuang, Song Wang, Zhen Yang, Jun Han 0003. 426-428 [doi]
• 2 0.66μJ/Ops Lightweight MLWE PQC KEM with Cryptanalysis-ASIC Co-OptimizationArchisman Ghosh 0002, Ming-Che Li, Lingke Ding, Suparna Kundu, Abdullah Sayeed, Angshuman Karmakar, Harshit Naman, Sarthak Antal, Ingrid Verbauwhede, Shreyas Sen. 428-430 [doi]
• OmniCrypt: A 435.86M-GOPS/W Bootstrappable Multi-Scheme FHE Accelerator with on-Chip Data Generation for Privacy-Preserving ComputationAdiwena Putra, Hyunjun Cho, Sungwoong Yune, Cuong Duong Manh, JaeHo Jeon, Joo-Young Kim 0001. 430-432 [doi]
• 2 1.19-to-7.34mW SQIsign-1D Isogeny-Based Post-Quantum Signature Verification Accelerator for IoTKrishna Sai Tarun Ramapragada, Utsav Banerjee. 432-434 [doi]
• 25.6 A 17%/27% Area-/Energy-Overhead Glitch-Transition Secure SHA-3 Engine Fusing Dual-Rail Precharge Logic and Asymmetric MaskingCankun Zhao, Hanyue Shui, Bohan Yang 0001, Wenping Zhu, Yuluan Cao, Zhang Hou, Yuqi Liu, Xiangdong Han, Shuying Yin, Weinan Chen, Hanning Wang, Jinjiang Yang, Min Zhu 0001, Aoyang Zhang, Leibo Liu. 434-436 [doi]
• 2/Lane Variation-Tolerant Probing-Attack Detector for an 8Gb/s/Lane Chip-to-Chip Interface in 16nm FinFETMao Li, Rentao Wan, Sanu K. Mathew, Vivek De, Mingoo Seok. 436-438 [doi]
• A Sub-Threshold All-NMOS Reconfigurable PUF with Secure Configuration Selection for Stable 6b/CellShufan Xu, Kunyang Liu, Lando Chan, Hironori Tagawa, Hirofumi Shinohara, Kiichi Niitsu. 438-440 [doi]
• A PVT Variation- and Attack-Tolerant Metastability-Based TRNG Using Binary Search in 2nmYelim Youn, Yong Lim, Jongmi Lee, Dongyeon Hong, Wan Kim, Yong-Sik Kwak, Kyoung-Jun Moon, Bogyeong Kang, Sangmin Yoo. 440-442 [doi]
• 25.10 A 65nm 0.066pJ/b Floating-Latch-Based True Random Number Generator Resilient to Power-Noise Injection AttacksKai Cheng, Yunbo Huang, Zunsong Yang, Li Wang, Hongyu Ren, Xiaoyu Shan, Pui-In Mak, Yong Chen 0005, Bo Li. 442-444 [doi]
• 2 Power Density at 360MHz, and Inherent Even Phase InterleavingJianxin Yang, Fuyao Zhang, Rui Paulo Martins, Mo Huang. 446-448 [doi]
• 26.2 A Compact 4Vin 93.4%-Peak-Efficiency 12A Load and 20mV Undershoot Resonant Sigma Converter with PCB-Embedded Converter-on-Substrate PackagingYukan Du, Shengdao Ren, Zheyuan Fei, Ziteng Chen, Menglian Zhao, Chushan Li, Yong Ding 0003, Wuhua Li, Zhichao Tan, Wanyuan Qu. 448-450 [doi]
• A Multi-Phase Hybrid Converter with Q Samplers Enabling Simultaneous IL Auto-Balance and Arbitrary Phase CountJiacheng Yang, Zihao Tang, Rui Paulo Martins, Mo Huang. 450-452 [doi]
• 3-Current-Density Quad-Output Converter with One Shared DC CapacitorQingqing Min, Jinyi Yuan, Ji Jin, Yichao Ji, Weiwei Xu, Lin Cheng. 452-454 [doi]
• 26.5 An Inductor-at-Middle Hybrid Buck Converter with Shared Power-Signal Path for Distributed Vertical Power DeliveryZhongyao Zhu, Junwei Huang, Zhibang Song, Zhewen Yu, Shousheng Han, Sai-Weng Sin, Yan Lu 0002. 454-456 [doi]
• 26.6 a 92.4%-Peak-Efficiency 48V to 0.8-to-1.6V Hybrid Converter with Inductor-Interleaved Fibonacci Switched-CapacitorHyun Woo Jeong, Chan-Ho Lee, Hyeon-Ji Choi, Sung-Wan Hong. 456-458 [doi]
• 26.7 A 100A 93.4%-Peak-Efficiency LLC Resonant Converter with an Embedded Primary-Current-Extracted RegulatorZeguo Liu, Yichao Ji, Zhiren Luo, Yu Ge, Weiwei Xu, Weiwei Huang, Lin Cheng. 458-460 [doi]
• A 1.2μs 1-to-12V Symbol Power Tracking Supply Modulator with Two-Step Subranging DVS Scheme and Boosted IL Slew Rate for 5G Mobile DevicesChangjin Chen, Minghao Shang, Yichao Ji, Lin Cheng 0001. 460-462 [doi]
• A Compact Dual-Capacitor Relay SPT Supply Modulator with Overshoot-Free Adaptive on-Time Control for 5G FR2 CMOS PAZhewen Yu, Zhiguo Tong, Junwei Huang, Jun Yin 0001, Yan Lu 0002. 462-464 [doi]
• 27.1 A 20GHz Frequency Synthesizer with Spur-Shaping Modulator Achieving 46.2fs Jitter and -76.5dBc Worst-Case Fractional SpurZonglin Ye, Yuxuan Sun, Longxiang Hou, Yuhan Ding, Yixuan Wen, Hongyang Zhang, Xinlin Geng, Qian Xie 0002, Shiheng Yang, Zheng Wang 0050. 466-468 [doi]
• A 157fsrms-Jitter, -73dBc-Fractional-Spur, Calibration-Free Cascaded SPLL Employing Robust Feedforward Noise Cancellation and MMD-Based Quantization-Error Cancellation with a 60MHz ReferenceHaoming Zhang, Yongjun He, Yuyang Zhu, Huanyu Ren, Tetsuya Iizuka. 468-470 [doi]
• rd-Order Fractional-N PLL with 164fsrms Jitter and a 100MHz ReferenceZhaochen Zhu, Qingxuan Lin, Zhiqiang Huang. 470-472 [doi]
• nd-Harmonic-Tracking Technique Achieving 202.7dBc/Hz Peak FoMT and 0.9dB-FoM Variation at a 1MHz Offset in a 39.6% Tuning RangeXincheng Du, Xiangxun Zhan, Tincheng Ou, Zaize Chen, Jinge Li, Haoran Li 0016, Zhizhan Yang, Zhuo Xu, Pui-In Mak, Rui Paulo Martins, Jun Yin 0001. 472-474 [doi]
• -1 VCO Featuring Improved Synchronization Using a Circular Pentafilar Transformer-Based TankYue Wu, Yatao Peng, Jiawei Li, Fengen Yuan, Jinge Li, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. 474-476 [doi]
• 27.6 A 9.7GHz Self-Linearized-VCO-Based FMCW Chirp Generator Achieving 1.56GHz/μs Slope and 0.57μS Duration with 0.094% RMS Frequency ErrorDaxu Zhang, Yuncheng Zhang, Zezheng Liu, Yuang Xiong, Michele Rossoni, Wenqian Wang, Ashbir Aviat Fadila, Duo Li, Minzhe Tang, Dongfan Xu, Carrel de Gomez, Dingxin Xu, Kazuaki Kunihiro, Hiroyuki Sakai 0009, Kenichi Okada 0001. 476-478 [doi]
• A 40.5-to-58.5GHz 36%-Fractional-Chirp-Bandwidth 18GHz-Absolute-Chirp-Bandwidth 2.2GHz/μs-Chirp-Rate 0.02%-Chirp-Error Post-Mixing Bandwidth-Extending Sawtooth-FMCW Frequency Synthesizer Employing a Chirp-Tracking ILFT and a Fractional-Bandwidth DoublerYi Liu, Zixi Jing, Wen Yang, Hanlin Yang, Bodong Zhang, Howard Cam Luong. 478-480 [doi]
• A 77GHz 8-bit CMOS Phase Shifter Adopting a Nested-Vector-Based Error Correction with 0.33°/0.07dB RMS-Error for MIMO Radar ApplicationsGeonho Park, Byeong-Taek Moon, Kyunghwan Kim, Doyoon Kim, Goeun Baek, Byungho Yook, Hyun-Chul Park, Chan Hong Park. 480-485 [doi]
• 27.9 A Dual-Mode DCO-PA with a Twisted 8-Shape Inductor for BLE Achieving 42% TX Efficiency at 1.6dBm and 0.29mW RX ClockJiawen Chen, Kai Xu, Luyi Guo, Teerachot Siriburanon, Jun Yin 0001, Bashir M. Al-Hashimi, Robert Bogdan Staszewski. 482-484 [doi]
• A 48-to-82.5GHz CMOS Split-Tail Gilbert-Cell Frequency Doubler Achieving 11% PAE at 8.5dBm Output PowerJismal Jamal, Lorenzo Piotto, Federico Vecchi, Mahmoud Mahdipour Pirbazari, Andrea Mazzanti. 484-486 [doi]
• 28.1 Importance of GaN for 5G and Solid-State mm-Wave Circuits of the FutureUmesh K. Mishra, Christopher J. Clymore, Emre Akso, Matthew Guidry. 488-490 [doi]
• 28.2 High-Selectivity, Tunable Filters with Zero Static Power Consumption Formed using Micromachined Magnetostatic Wave CavitiesShun Yao, Xingyu Du, Yixiao Ding, Shuxian Wu, Chin-Yu Chang, Mark G. Allen, Roy H. Olsson. 490-492 [doi]
• Body-Interfaced BiosensorsWei Gao. 492-493 [doi]
• 28.4 The Sensing, Computing, and Devices Opportunities of Computational Behavioral Phenotype: An Autism Spectrum Disorder Case StudyGuillermo Sapiro, Matías Di Martino, Geraldine Dawson. 494-496 [doi]
• 29.1 A 48-Day-Duration Pasting Bioelectronic Device Realizing Closed-Loop Realtime Detection and Precision Treatment for Type-1 DiabetesXiaoyuan Wu, Kangjie Zhao, Mengyao Liu, Shixiang Ding, Xuyang Li, Yuri Lu, Ruohan Wang, Ziyan Zhao, Liwen Qian, Yang Yang, Jing Wu, Leilei Huang, Chunqi Shi, Yuhong Wei, Yue Lu, Ningzi Guan, Haifeng Ye, Jinghong Chen, Runxi Zhang. 498-500 [doi]
• A 1400THz/s Ultra-Fast-Scan 14GHz EPR-on-a-Chip Based on Injection-Locked Phase Detection Featuring 120μM Concentration SensitivityJean-Baptiste David, Alexandre Siligaris, Cédric Dehos, Jose-Luis Gonzalez Jimenez, Jean-François Jacquot, Christian Lombard, Kevin Chighine, Vincent Maurel, Serge Gambarelli. 500-502 [doi]
• 29.3 A 256-Channel Event-Driven Readout for Solid-State Nanopore Single-Molecule Sensing with 193pArms Noise in a 1MHz BandwidthSander Crols, Carolina Mora Lopez, Filip Tavernier, Marian Verhelst, Nick Van Helleputte. 502-504 [doi]
• 29.4 Shape-Memory Multi-Size Micro-Cage Array on CMOS with Integrated Electrochemical Sensors for Joint Bio-Sample Manipulation and SensingZhikai Huang, Fuze Jiang, Hangxing Liu, Adam Wang, Yuguo Sheng, Marco Saif, Hua Wang 0006. 504-506 [doi]
• 29.5 A Sub-Gram Individual Plant Stress Sensor Tag for Smart FarmingDaiki Nitto, Keishi Yanase, Yui Fujisawa, Jun Shiomi, Yoshihiro Midoh, Takuya Wadatsumi, Makoto Nagata, Ahmet Öncü, Constantine Sideris, Chetphilin Suriyasak, Yushi Ishibashi, Noriyuki Miura. 506-508 [doi]
• 29.6 A 65nm CMOS Hydrogel-Based Dual Fluorescence Sensor for Bioavailable Phosphorus DetectionTing-Yu Cheng, Raj S. Mukkamala, Reinaldo E. Alcalde, Mohamadamin Panahandeh, Akshit Agarwal, Julia A. Kornfield, Dianne K. Newman, Azita Emami. 508-510 [doi]
• 30.1 A 28nm 127.54TFLOPS/W MXFP6 and 117.42TFLOPS/W MXFP8 Compute-in-Memory Macro with Adaptive-Preserved-Bit-Width and Serial-Dual-Bit-Sliding SchemesXing Wang, Yucheng Du, Tianhui Jiao, Defa Wu, Xi Chen 0107, Miaoyu Tang, Yi Yang 0001, Zhichao Liu, An Guo 0001, Gaoming Fu, Peng Li, Jun Dong, Bo Liu 0019, Xinning Liu, Weiwei Shan, Hao Cai 0001, Guangyu Sun 0003, Lin Tong, Jun Yang 0006, Xin Si. 512-514 [doi]
• A 12nm 4Mb 104.56-to-137.75TFLOPS/W Charge-Trap Transistor-Based Computing-in-Memory Macro Using Analog-Predict-Digital-Compute for AI Edge DevicesJunzhe Shen, Zhidao Zhou, Wenfeng Zha, Zhi Li 0062, Weizeng Li, Bohan Wang, Junyu Zhu, Hanghang Gao, Zhongze Han, Yiman Wang, Linfang Wang, Hongyang Hu, Qing Luo, Chunmeng Dou, Ming Liu 0022. 514-516 [doi]
• A 22nm 96Mb 50.6-to-90.2TFLOPS/W Non-Linear MLC ReRAM CIM Macro with High-Retention for Mamba/Transformer/CNNHung-Hsi Hsu, Win-San Khwa, Yao-Kai Yeh, Chih-Ling Wu, Chang-Yuan Chen, Yen-Che Huang, Yen-hua Lin, Cheng-Feng Chang, Yen-Tung Shao, Jen-Chun Tien, De-Qi You, Ping-Sheng Wu, Bo Zhang, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang. 516-518 [doi]
• 30.4 A 28nm 106.85TOPS/W and 77.68TFLOPS/W CIM Macro with Stage-Wise-Enabled Lossless Compressors Based on Sign-Bit-Embedded Transition-Counting-Lines for Edge-AI DevicesLichen Feng, Yunlong Liu, Lin Wu, Dong Li 0046, Zhangming Zhu. 518-520 [doi]
• 30.5 A 16nm 72kb 120.5TFLOPS/W Versatile-Format Dual-Representation Gain-Cell CIM Macro for General Purpose AI TasksJen-Chun Tien, Win-San Khwa, Le-Jung Hsieh, Tsung-Han Lou, Jyun-Cheng Bai, Yu-Sheng Kao, Ting-Hao Hsu, Mai Tseng, Hung-Hsi Hsu, Yao-Kai Yeh, De-Qi You, Ashwin Sanjay Lele, Brian Crafton, Bo Zhang, Ping-Sheng Wu, Ya-Tang Yang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang. 520-522 [doi]
• 30.6 A 16Mb 166.8TOPS/W Near-Memory Phase-Domain-Computing Ferroelectric NAND Flash for Approximate Nearest Neighbor Search on Edge DevicesWeizeng Li, Bohan Wang, Zhidao Zhou, Junyu Zhu, Zhi Li 0062, Junzhe Shen, Wenfeng Zha, Zhongze Han, Yiman Wang, Linfang Wang, Hongyang Hu, Qing Luo, Chunmeng Dou, Ming Liu 0022. 522-524 [doi]
• 2 3D Two-DRAM-One-Logic Process-Near-Memory Chip for Edge LLM ApplicationsYue Cao, Jinghao Jiang, Haijun Jiang, Qian Zhang, Xuanzhi Liu, Jinhui Cheng, Zhongze Han, Xiping Jiang, Fengguo Zuo, Song Wang, Fujun Bai, Yixin Guo, Chunmeng Dou, Jianguo Yang, Hangbing Lv, Qi Liu 0010, Ming Liu 0022. 524-526 [doi]
• A 16nm, 1Mb, 1-to-8b-Configurable 444.21TOPS/W Fully Digital SRAM Compute-in-Memory Macro for Hybrid SNN-CNN Edge ComputingYao-Kai Yeh, Jian-Wei Su, Ting-Hao Hsu, Mai Tseng, Jen-Chun Tien, Ko-Chi Chen, Chih-Yen Yue, Yu-En Lin, Yu-Jia Hu, Le-Jung Hsieh, Jyun-Cheng Bai, Yu-Sheng Kao, Tsung-Han Lou, Hung-Hsi Hsu, De-Qi You, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang 0001, Ya-Tang Yang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang. 526-528 [doi]
• 2, Fully Synthesizable, Digital Compute-in-Memory Accelerator Supporting INT8×INT8 with Zero-Point Quantization in Intel 18A TechnologyAmit Agarwal 0001, Steven K. Hsu, Mark A. Anders 0001, Arnab Raha, Deepak A. Mathaikutty, Ram Krishnamurthy 0001. 528-530 [doi]
• 31.1 A 14.08-to-135.69Token/s ReRAM-on-Logic Stacked Outlier-Free Large-Language-Model Accelerator with Block-Clustered Weight-Compression and Adaptive Parallel-Speculative-DecodingPingcheng Dong, Yonghao Tan, Xuejiao Liu, Peng Luo, Yu Liu 0007, Di Pang, Songchen Ma, Xijie Huang, Shih-Yang Liu, Dong Zhang, Zhichao Lu, Luhong Liang, Chi-Ying Tsui, Fengbin Tu, Liang Zhao, Kwang-Ting Cheng. 532-534 [doi]
• 31.2 Revolver: Low-Bit GenAI Accelerator for Distilled-Model and CoT with Phase-Aware-Quantization and Rotation-Based Integer-Scaled Group QuantizationSangjin Kim, Jungjun Oh, Byeongcheol Kim, Yuseon Choi, Gwangtae Park, Hoi-Jun Yoo. 534-536 [doi]
• A 51.6μJ/Token Subspace-Rotation-Based Dual-Quantized Large-language-Model Accelerator with Fused Scale-Activation INT Datapath and Rearranged Bit-Slice LUT ComputationBo Liu 0019, Zihan Zou, Xinming Yan, Xilong Kang, Xinyang Chen, Bo Hu, Jiaming Lin, Haoran Du, Jun Yang 0006, Xin Si, Hao Cai 0001. 536-538 [doi]
• 31.4 VARSA: A Visual Autoregressive Generation Accelerator Using Performance-Scalable Multi-Precision PE-LUT and Grid-Similarity Attention CompressionJiaqi Zhou, Hongou Li, Keyao Jiang, Yiyang Sun, Tianyu Jia. 538-540 [doi]
• 31.5 SoulMate: A 9.8mW Mobile Intelligence System-on-Chip with Mixed-Rank Architecture for On-Device LLM PersonalizationSeongyon Hong, Jiwon Choi, Jeonggyu So, Nayeong Lee, Wooyoung Jo, Zhamaliddin Kalzhan, Woojin Chin, Hoi-Jun Yoo. 540-542 [doi]
• Tri-Oracle: A 17.78μJ/Token Vision-Language Model Accelerator with Token-Attention-Weight Redundancy PredictionSeungjae Yoo, Hangyeol Kim, Muyoung Son, Yi Chen, Suheon Jeong, Joo-Young Kim. 542-544 [doi]
• 31.7 LUT-SSM: A 99.3TFLOPS/W LUT-Based State-Space Model Accelerator Using Energy-Efficient Element-Wise Layer Fusion and LUT-Friendly Weight-Only QuantizationSunwoo Yoo, Dongyun Kam, Gunho Park, Soonhyun Kwon, Dongsoo Lee, Youngjoo Lee. 544-546 [doi]
• A 28nm Speculative-Decoding LLM Processor Achieving 105-to-685µs/Token Latency for Billion-Parameter ModelsYang Wang 0089, Huanyu Wang, Jiaxin Yang, Yutong Su, Ruiqi Guo, Zhiheng Yue, Jiangyuan Gu, Shaojun Wei, Yang Hu 0001, Shouyi Yin. 546-548 [doi]
• 31.9 Alpha-Vision: A Real-Time Always-on Vision Processor with 787µs Face Detection Latency in <5mWBen Keller, Rangharajan Venkatesan, Steve Dai, Jason Clemons, Matthew Fojtik, Muya Chang, Thierry Tambe, Nathaniel Ross Pinckney, Stephen G. Tell, Qijing Huang 0001, Shalini De Mello, Brucek Khailany. 548-550 [doi]
• 32.2 A PVT-Robust Frequency-Scalable Fully Dynamic ΔΣ ADC with Bottom-Plate Level ShiftTohru Kaneko, Hideaki Ishida, Yuzuru Yamaki, Satoshi Takehara, Un-Ku Moon. 554-556 [doi]
• 32.3 An 85.1dB-SNDR 8MS/s Incremental Pipeline ADC with Dual-Residue-Assisted Exponential QuantizationZongnan Wang, Bingrui Li, Haoyang Luo, Chenyuan Chu, Jiachang Yang, Yuan Wang 0001, Xiyuan Tang. 556-558 [doi]
• A 103.9dB-SFDR 83.8dB-SNDR 3MHz-BW Multi-Bit Quadratic-Exponential Noise-Coupled IDSM with High Tolerance to DAC Non-LinearityZhensheng Li, Biao Wang, Mingqiang Guo, Rui Paulo Martins, Sai-Weng Sin. 558-560 [doi]
• A 22-to-25GHz CMOS Non-Magnetic Balanced Circulator Achieving at Least 20dB TX-RX Isolation for an Antenna VSWR of 2Heqi Deng, Ehsan Shokrolahzade, Niels Fakkel, Marco Spirito, Fabio Sebastiano, Masoud Babaie. 562-564 [doi]
• 33.2 An Infinite-Loop CMOS-Compatible Isolator Enabled True VSWR-Resilient Power Amplifier for 6G FR3 in Massive MIMO and Phased-Array SystemsMohsen Ghorbanpoor, Mohamed Eleraky, Konstantinos Manetakis, Pascal Nussbaum, Hua Wang 0006. 564-566 [doi]
• 33.3 A 6GHz Quadrature Digital Transmitter Supporting a 1GHz Signal Bandwidth with 55dB Dynamic Range in 28nm CMOSYicheng Li 0002, Feng Xie, Yun Yin, Lixuan Cao, Tianze Yang, Jiaxiang Li, Hongtao Xu. 566-568 [doi]
• 33.4 A 4.5-to-7.2GHz Beyond Rail-to-Rail Output SCPA with 27.9dBm Pout and 46.2% DE at 5.1GHz Using Periodic Voltage-Pacing NetworkBingzheng Yang, Jie Zhou 0026, Junfa Mao, Xun Luo. 568-570 [doi]
• th-Harmonic SuppressionXiqing Liang, Bingzheng Yang, Hongxin Tang, Xun Luo. 570-572 [doi]
• 34.1 A 128mW 2×4 Radar-on-Chip with Forward-ΔΣ DPLL-Locked Multi-Injection RTWO in 22nm CMOS Enabling ADC-Free Digitization and PS-Free Beamforming Demonstrated in In-Cabin Vital-Sign MonitoringLiheng Lou, Zeyu Zhou, Luyao Yuan, Yucheng Long, Gong Chen, Xiaoyu Li, Shaoqi Yang, Han Cui, Ji Peng, Weichen Tao, Juncheng Deng, Yizhe Hu. 576-578 [doi]
• 34.2 Compact, Low-Power 60-and-77GHz 4T/4R Multi-Mode FMCW Radar RFICs in 28nm CMOSByeong-Taek Moon, Mingyuan Li, Jun-Seuk Suh, Minseob Lee, Doyoon Kim, Kyunghwan Kim, Geonho Park, Goeun Baek, Byungho Yook, Dooseok Choi, Kyungwoo Yoo, JunSeong Kim, Taewoo Yu, Seonghyeon Kang, Hyeonsu Jo, Juhee Son, Sangsung Lee, Pak-Kim Lau, Ivan Siu-Chuang Lu, Gregory Eric Rogers, Ajaypat Jain, Jian Wang, Viduneth Ariyarathna, Wan Jong Kim, Oren E. Eliezer, Gennady Feygin, Wen Zhou, Kyoung-Jun Moon, Jaehyun Chung, Woncheol Lee, Seongjung Kim, Jonghyun Kim, Joonggeun Lee, Taeyeon Kim, Sungjoo Kim, Youngki Lee, Yonghwan Harold Jang, Sai Krishna Rayudu, Shihchieh Chien, Ying Chen, Hyungsun Lim, Kidong Kang, SungJun Lee, Joonhee Lee, Jeongyeol Bae, Hyun-Gi Seok, Pranav Dayal, Wanghua Wu, Hyun-Chul Park, Joonhoi Hur, Sangmin Yoo, Chan Hong Park, Joonsuk Kim. 578-580 [doi]
• A 234-to-252GHz Dual-Polarized Transceiver Using Antenna-in-Package Technologies for Cross-Polarimetric SensingXibi Chen, Georgios C. Dogiamis, Ruonan Han 0001. 580-582 [doi]
• A 1.6-to-3.8GHz Reconfigurable FMCW Radar SoC with 81.5% Relative-Bandwidth PLL for Real-Time Life Detection in Disaster ResponseRenjie Fu, Linxu Shi, Fanxun Cai, Yunqi Yang, Hao Lei, Zhigang Fu, Yilin Xu, Pengcheng Wang, Ziyang Li, Shixuan Wang, Junkai Jiao, Dingqi Liang, Lianbo Wu, Guangzhong Zhang, Naike Du, Zijie Wang, Yucong Gu, Xiuzhu Ye, Xiao Fang, Weisheng Zhao, Hui Zhang. 582-584 [doi]
• 2 11.4mW IEEE 802.15.4a/z/ab Compatible Aliasing-Suppressing All-Digital IR-UWB Transmitter Featuring Comb-Notched Maximally Flat Amplitude Spectral ShapingJihun Son, Minsu Park, Chansoo Park, Kyoungtae Lee, Jong-Hyeok Yoon, Junghyup Lee, Minyoung Song. 584-586 [doi]
• 35.1 CANCEL: A Cancellation-Aided Ambient IoT Nanopowered Communication System for Energy-Limited TagsHany Abolmagd, Shihkai Kuo, Md Nazmul Hasan, Sreevatsank Kadaveru, Aboozar Ghorbani-Nejad, Manideep Dunna, Ata Khorami, Yichen Yu, Dinesh Bharadia, Patrick P. Mercier, Sudip Shekhar. 588-590 [doi]
• 35.2 A 20mg Battery-Free Crystal-Less Miniaturized TX System for Flying Insects Localization with 1.45km RangeYi Shen, Steve Young, Demba Komma, Ryan Strohman, Rahul Narasimha, Jeongtaek Chang, Andrea Bejarano-Carbo, Yunfan Wang, Guanren Tao, Hun-Seok Kim, David T. Blaauw. 590-592 [doi]
• 2 Blocker-Tolerant Non-Uniform Current Sub-Sampling Receiver with a Discrete-Time FIR/IIR Filter Enabling 56dB Rejection in 28nm CMOSMostafa M. Ayesh, Mike Shuo-Wei Chen. 592-594 [doi]
• 35.4 A NearLink 2.0 Compliant Dual-Band RF Transceiver for Smart Wireless Personal Audio ApplicationsRui Yu, Supeng Liu, Xuesong Chen, TanTan Zhang, Wei Khuen Chan, Deyong Hu, Haohong Yu, Wang Yao, Theng-Tee Yeo, Peilin Wu, Xingpeng Zhao, Zhan Guo. 594-596 [doi]
• 35.5 Fully Integrated Backscattered WiFi 802.11b Transmitter with Active Harmonics and Image Rejection for 30dB IRR and 36dB HRR at ${0. 8 8} {\mu} \mathrm{W}$Ruiyuan Yang, Karim Ali 0007, Massimo Alioto. 596-598 [doi]
• 36.1 ReFIND: A Resolution-Reconfigurable Bio-Signal Classification SoC Enabling $>10\times$ Savings in AFE Power Per ChannelAviral Pandey, I-Ting Lin, Dhruv Vaish, Ashwin Rammohan, Savit Bhat, Jade Pinkenburg, Rikky Muller. 600-602 [doi]
• 36.2 A Neural Interface SoC for Smart Glasses with Low-Power Neural Commanding and Efficient LoRA-Enabled On-Chip LearningZhiwei Zhong, He Yu, William McGarry, Yijie Wei, Jie Gu 0001. 602-604 [doi]
• A 16.4nJ/Class Patient-Independent Prototype-Based Spatio-Temporal CNN Processor with Forward-Inference-Based Adaptation for Robust and Low-Latency Seizure DetectionYang Wang, Longyang Lin, Jerald Yoo, Jiamin Li. 604-606 [doi]
• 36.4 ANP-OT: A 0.17nW/Synapse 0.46pJ/SOP Neuromorphic Olfactory Processor with On-Chip Transfer Learning for Non-Invasive Cross-Hospital Cross-Pulmonary-Disease DiagnosisDexuan Huo, Ziyi Cheng, Jilin Zhang, Yumeng Jiang, Lushuo Zhang, Hui Wang, Na Ma, Zebin Huang, Minggui Lin, Yunxia Zhao, Zhihua Wang 0001, Kea-Tiong Tang, Hong Chen 0002. 606-608 [doi]
• nd-Order kT/C-Noise Shaping for Wearable ExG AcquisitionGeunha Kim, Kyuhyeon Park, Minoo Lee, Jeongyoon Wie, Seokhan Jeong, Yeonjae Shin, Kyoungtae Lee, Jong-Hyeok Yoon, Minyoung Song, Junghyup Lee. 608-610 [doi]
• 36.6 A Sparsity-Aware Neural Interface with CIM-Based Predictive Focused Sampling for Hotspot Spike TrackingHui Wu 0010, Fengshi Tian, Jinbo Chen 0002, Zhipeng Liao, Hongyong Zhang, Xing Liu 0014, Wenjun Zou, Sirui Cheng, Zhao Zhang 0004, Jianlong Xu, Chi-Ying Tsui, Kwang-Ting Tim Cheng, Jie Yang 0033, Mohamad Sawan. 610-612 [doi]
• A 90.7%-Efficiency Hybrid Optogenetic Stimulation System with Sub-Threshold Electrical Stimuli Achieving 70.6% Optical Energy SavingJoonghoon Kang, Hyeonhee Roh, Kyeongho Eom, Hyun-Su Lee, Hojae Chon, Maesoon Im, Hyung-Min Lee. 612-614 [doi]
• An 80×80μ$\mathrm{m}^{2}$/Pixel 55.48dB-Wide-DR 400-Pixel Subretinal Prosthesis SoC with Power-Aware Light Adaptation and Charge-Recycling Local Dynamic SupplyKyeongho Eom, Hyun-Su Lee, Minju Kim, Maesoon Im, Hyung-Min Lee. 614-616 [doi]
• A CMOS Neural Probe with 1280 Electrodes and 88 Emission Sites Featuring Thermo-Optic Switching and on-Chip Calibration for Dual-Wavelength OptogeneticsXiaolin Yang, Pieter Neutens, Alexis Humblet, Chutham Sawigun, John O'Callaghan, Thijs Geurts, Zheyi Li, Yaroslav Gubin, Koen De Munck, Harrie A. C. Tilmans, Anabel De Proft, Barundeb Dutta, Carolina Mora Lopez. 616-618 [doi]
• A 43.8-to-662.0μW 27.5-to-878.9fps Frame-Rate-Scalable Duty-Cycled Electrical Impedance Tomography System with MIMO Current-Balancing IAHaidam Choi, Gichan Yun, Ji-Hoon Suh, Seonwoo Park, Donghyeon Yi, Sohmyung Ha, Minkyu Je. 618-620 [doi]
• A 72Gb/s/pin Single-Ended Driver-Cooperative Coded PAM3 Transceiver with Asymmetric Data-Dependent Equalization and Bias-Peaking for Chiplets and Memory InterfacesHongzhi Wu, Xuxu Cheng, Yangyi Zhang 0002, Xiongshi Luo, Zhenghao Li, Weitao Wu, Quan Pan 0002. 624-626 [doi]
• 37.2 A 47.0Tb/s/mm 112Gb/s/pin PAM4 Single-Ended Transceiver Featuring 4-Aggressor Crosstalk Cancellation and Supply-Noise Tolerance for Short-Reach Memory InterfacesQian Liu, Yiheng Hui, Yuanlin Nong, He Ma, Yiwei Xu, Hao Hu, Jinpeng Zhu, Quan Wang, Lei Wang, Li Du, Yuan Du. 626-628 [doi]
• 37.3 A 2nm All-Digital 14.4Gb/s/pin LPDDR6 PHY with Quarter-Rate Clocking Architecture and Multi-Level FIFO-Based Speculative DFEYoonjae Choi, Daero Kim, Myunggon Kim, Sangmin Lee, Hansol Kang, Gwangwon Lee, Yoonhyung Kim, Sungsik Kang, Hyun Cho, Boyoung Kang, Kyoungwon Lee, Jaegeun Song, Jinho Choi, Shinyoung Yi 0002, Billy Koo, Kwanyeob Chae, Hyo-Gyuem Rhew. 628-630 [doi]
• 37.4 A 100Gb/s, 1.92pJ/b Aggregate 4-Lane Single-Ended NRZ Transceiver with 15dB Far-End Crosstalk Cancellation via On-Chip Feature Extraction and Classification in 16nm FinFETXiaohui Lin 0012, Ramin Javadi, Bella Bose, Tejasvi Anand. 630-632 [doi]
• A 16Gb/s/pin 0.51pJ/b Single-Ended NRZ Transceiver with Distributed Dual-Loop VDDQ-Ripple Compensation and Dynamic Clock Duty-Cycle Calibration for Memory InterfacesYuchen He, Yunbin Luo, Yunzhengmao Wang, Tengyue Yi, Chen Jiang, Chixiao Chen, Qi Liu 0010, Ming Liu 0022, Wenning Jiang. 632-634 [doi]
• 37.6 A 0.092pJ/b and 7.7fJ/b/dB Cross-Self-Referenced Slope-Sampling Receiver with Long-Tail ISI Robustness for Next-Generation Low-Power Memory InterfacesKi-Soo Lee, Chanheum Han, Joo-Hyung Chae. 634-636 [doi]
• 37.7 A 12.8Gb/s Parallel Receiver with a One-Way Self-Training Scheme for Equalizing ISI and Reflections in Multi-Drop Memory InterfacesJi-Won Moon, Taehyeon Kim, Minwook Kim, Hyeonwoo Seong, Jewon Lee, Jeongbin Park, Dongjun Park, Jaehoon Lee, Jung-June Park, Chiweon Yoon, Jae-Yoon Sim, Seon-Kyoo Lee. 636-638 [doi]
• A 0.87pJ/b 17Gb/s/pin Parallel Receiver with a Local DQS Recovery for a Supply-Noise-Tolerant DQS Distribution in High-Performance NAND Flash InterfacesByeong-Chan Kim, Kyongsu Lee, Dongjun Park, Jung-June Park, Chiweon Yoon, Jae-Yoon Sim, Seon-Kyoo Lee. 638-640 [doi]
• 37.9 A 14Gb/s/pin 0.163pJ/b DQ Receiver for HBM with Baud-Rate Phase Tracking Loop Supporting Background Offset CalibrationJeonghyeon Lee, Ho-Joon Shin, Han-Gon Ko, Kwanseo Park. 640-642 [doi]