Abstract is missing.
- Practical evaluation of masking software countermeasures on an IoT processorDavid McCann, Elisabeth Oswald. 1-6 [doi]
- Towards mixed structural-functional models for algebraic fault attacks on ciphersJan Burchard, Ange Salome Messeng Ekossono, Jan Horácek, Mael Gay, Bernd Becker 0001, Tobias Schubert, Martin Kreuzer, Ilia Polian. 7-12 [doi]
- Robust secure design by increasing the resilience of Attack Protection BlocksSeyed-Abdollah Aftabjahani, Amitabh Das. 13-18 [doi]
- Lightweight obfuscation techniques for modeling attacks resistant PUFsMohd Syafiq Mispan, Basel Halak, Mark Zwolinski. 19-24 [doi]
- Entropy justification for metastability based nondeterministic random bit generatorRachael J. Parker. 25-30 [doi]
- Self-timed Ring based True Random Number Generator: Threat model and countermeasuresGregoire Gimenez, Abdelkarim Cherkaoui, Raphael Frisch, Laurent Fesquet. 31-38 [doi]
- Provable secure dual-server public key encryption with keyword searchKaibin Huang, Raylin Tso. 39-44 [doi]
- Experimentations on scan chain encryption with PRESENTMathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre. 45-50 [doi]
- Hacking the Control Flow error detection mechanismGiorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre. 51-56 [doi]
- A red team blue team approach towards a secure processor design with hardware shadow stackCyril Bresch, Adrien Michelet, Laurent Amato, Thomas Meyer, David Hély. 57-62 [doi]
- Challenges and trends in SOC Electromagnetic (EM) CrosstalkPadelis Papadopoulos, Anand Raman, Yorgos Koutsoyannopoulos, Nikolas Provatas, Magdy Abadir. 63-69 [doi]
- SNIFFER: A high-accuracy malware detector for enterprise-based systemsEvan Chavis, Harrison Davis, Yijun Hou, Matthew Hicks, Salessawi Ferede Yitbarek, Todd M. Austin, Valeria Bertacco. 70-75 [doi]
- Hardware performance counters for system reliability monitoringElena Woo Lai Leng, Mark Zwolinski, Basel Halak. 76-81 [doi]
- Estimating Target Distribution in security assessment modelsEli Weintraub. 82-87 [doi]
- Hardware reverse engineering: Overview and open challengesMarc Fyrbiak, Sebastian Strauss, Christian Kison, Sebastian Wallat, Malte Elson, Nikol Rummel, Christof Paar. 88-94 [doi]
- A look at the dark side of hardware reverse engineering - a case studySebastian Wallat, Marc Fyrbiak, Moritz Schlogel, Christof Paar. 95-100 [doi]
- Secure authentication of electronic systems with autonomous optical nano-devicesBozena Kaminska, Jasbir N. Patel, Hao Jiang. 101-104 [doi]
- Learning lemma support graphs in Quip and IC3Ryan Berryhill, Neil Veira, Andreas G. Veneris, Zissis Poulos. 105-110 [doi]
- Asserting causal properties in High Level SynthesisErwan Fabiani, Loïc Lagadec, Mohamed Ben Hammouda, Ciprian Teodorov. 111-116 [doi]
- Security of FPGAs in data centersSteve Trimberger, Steve McNeil. 117-122 [doi]
- Protecting partial regions in FPGA bitstreamsKaren Horovitz, Meha Kainth, Ryan Kenny. 123-127 [doi]
- Zero bit-error-rate weak PUF based on Spin-Transfer-Torque MRAM memoriesElena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto. 128-133 [doi]
- Opening pandora's box: Implication of RLUT on secure FPGA applications and IP securityDebapriya Basu Roy, Shivam Bhasin, Ivica Nikolic, Debdeep Mukhopadhyay. 134-139 [doi]
- Maximizing the throughput of threshold-protected AES-GCM implementations on FPGAJo Vliegen, Oscar Reparaz, Nele Mentens. 140-145 [doi]
- Efficient design of Oscillator based Physical Unclonable Functions on Flash FPGAsUgo Mureddu, Oto Petura, Nathalie Bochard, Lilian Bossuet, Viktor Fischer. 146-151 [doi]