Abstract is missing.
- Performance-Portable Distributed k-Nearest Neighbors using Locality-Sensitive Hashing and SYCLMarcel Breyer, Gregor Daiß, Dirk Pflüger. [doi]
- Accelerating Regular-Expression Matching on FPGAs with High-Level SynthesisDevon Callanan, Luke Kljucaric, Alan D. George. [doi]
- Enabling OpenCL and SYCL for RISC-V processorsRod Burns, Colin Davidson, Aidan Dodds. [doi]
- Experiences Porting the SU3_Bench Microbenchmark to the Intel Arria 10 and Xilinx Alveo U280 FPGAsDouglas Doerfler, Farzad Fatollahi-Fard, Colin MacLean, Tan Nguyen, Samuel Williams, Nicholas J. Wright, Marco Siracusa. [doi]
- Executing Graphs with OpenCLErik Tomusk. [doi]
- Enabling the Use of C++20 Unseq Execution Policy for OpenCLPo-Yao Chang, Tai-Liang Chen, Jenq Kuen Lee. [doi]
- A Hands-On Introduction To SYCLRod Burns, Igor Vorobtsov, Aksel Alpay, Ronan Keryell, Michael Steyer, Gordon Brown. [doi]
- hipSYCL in 2021: Peculiarities, unique features and SYCL 2020Aksel Alpay, Vincent Heuveline. [doi]
- Sylkan: Towards a Vulkan Compute Target Platform for SYCLPeter Thoman, Daniel Gogl, Thomas Fahringer. [doi]
- Experiences With Adding SYCL Support to GROMACSAndrey Alekseenko, Szilárd Páll, Erik Lindahl. [doi]
- Experiences Supporting DPC++ in AMReXSravani Konda, Dunni Aribuki, Weiqun Zhang, Kevin Gott, Christopher Lishka. [doi]
- Profiling Heterogeneous Computing Performance with VTune ProfilerVladimir Tsymbal, Alexandr Kurylev. [doi]
- SYCL, DPC++, XPUs, oneAPIJames Reinders. [doi]
- Toward Evaluating High-Level Synthesis Portability and Performance between Intel and Xilinx FPGAsAnthony M. Cabrera, Aaron R. Young, Jacob Lambert, Zhili Xiao, Amy An, Seyong Lee, Zheming Jin, Jungwon Kim, Jeremy Buhler, Roger D. Chamberlain, Jeffrey S. Vetter. [doi]
- On measuring the maturity of SYCL implementations by tracking historical performance improvementsWei-Chen Lin, Tom Deakin, Simon McIntosh-Smith. [doi]
- Developing medical ultrasound imaging application across GPU, FPGA, and CPU using oneAPIYong Wang 0032, Yongfa Zhou, Scott Wang, Wang Yang, Qing Xu, Chen Wang. [doi]
- Toward Performance Portability of Highly Parametrizable TRSM Algorithm Using SYCLThales Sabino, Mehdi Goli. [doi]
- Extending DPC++ with Support for Huawei Ascend AI ChipsetWilson Feng, Rasool Maghareh, Kai-Ting Amy Wang. [doi]
- Can SYCL and OpenCL meet the challenges of functional safety?Rod Burns, Illya Rudkin. [doi]
- FAST: A framework for high-performance medical image computing and visualizationErik Smistad. [doi]
- Toward a Better Defined SYCL Memory Consistency ModelBen Ashbaugh, James C. Brodman, Michael Kinsner, Gregory Lueck, S. John Pennycook, Roland Schulz. [doi]
- Performance Evaluation and Improvements of the PoCL Open-Source OpenCL Implementation on Intel CPUsTobias Baumann, Matthias Noack, Thomas Steinke 0001. [doi]