Table of Contents

• 90° Hybrid coupler design technique for wideband and multimode mm-wave operations featuring lateral ground planes virtual expansion in 28nm FD-SOI CMOS technologyF. Torres, Eric Kerherve, Andreia Cathelin. 1-4 [doi]
• ASIC power-estimation accuracy evaluation: A case study using video-coding architecturesMurilo R. Perleberg, Jones W. Goebel, Mateus S. Melo, Vladimir Afonso, Luciano Volcan Agostini, Bruno Zatt, Marcelo Schiavon Porto. 1-4 [doi]
• A path energy control technique for energy efficiency on wireless sensor networksF. Tubiello, Leticia Bolzani Poehls, Thais Webber, César Augusto Missio Marcon, Fabian Vargas. 1-4 [doi]
• Exploring power-performance-quality tradeoff of approximate adders for energy efficient sobel filteringLeonardo Bandeira Soares, Morgana M. A. da Rosa, Cláudio Machado Diniz, Eduardo A. C. da Costa, Sergio Bampi. 1-4 [doi]
• Optimization-based reconfigurable approach for low-power 3D chip-multiprocessorsAniseh Dorostkar, Arghavan Asad, Mahmood Fathy, Farah Mohammadi. 1-4 [doi]
• Extending universal verification methodology with fault injection capabilitiesDouglas Lohmann, Fabrizio Maziero, Elco Joao dos Santos, Djones Lettnin. 1-4 [doi]
• Small lightweight hash functions in FPGACarlos Andres Lara-Nino, Miguel Morales-Sandoval, Arturo Diaz-Perez. 1-4 [doi]
• A design flow of asynchronous burst-mode circuits without fundamental-mode timing assumptionHigor A. Delsoto, Duarte L. Oliveira, Lucas M. Santana, Lester de Abreu Faria. 1-4 [doi]
• VLSI implementation of channel estimation for millimeter wave beamforming trainingSebastian Birke, Wei-Jhe Chen, Gaojian Wang, Dominik Auras, Chung-An Shen, Rainer Leupers, Gerd Ascheid. 1-4 [doi]
• Strategy for higher education in electronic circuits and systems in the perspective of the up-coming digital societyOlivier Bonnaud, Laurent Fesquet, Luc Hebrard. 1-4 [doi]
• Analog front-end design of contactless RFID smart card ISO/IEC14443A standard - CompliantYao-Ming Kuo, Agustin Grosso, Flavio Galimberti, Juan Tantera, Jorge Mallo, Sebastian Verrastro. 1-4 [doi]
• Sense resistor-free analog power sensor for boost converter with 14.1% gain error and 9.4% offset errorShrikant Singh, Debashis Mandal, Bertan Bakkaloglu, Sayfe Kiaei. 1-4 [doi]
• A 10.9-μW/pole 0.4-V active-RC complex BPF for Bluetooth low energy RF receiversLucas C. Severo, Wilhelmus A. M. Van Noije. 1-4 [doi]
• A new four-dimensional chaotic system with hidden attractor and its circuit designSundarapandian Vaidyanathan, Esteban Tlelo-Cuautle, Jesús Manuel Muñoz-Pacheco, Aceng Sambas. 1-4 [doi]
• An all-digital physical and MAC layer architectures for a reconfigurable Bluetooth transmitterJ. M. Sanchez-Venegas, Abisai Ramirez-Perez, Ramón Jaramillo-Ramirez, Ramón Parra-Michel. 1-4 [doi]
• Reducing the amount of transistors by gate mergingLuciana Mendes da Silva, Guilherme Bontorin, Ricardo Reis. 1-4 [doi]
• Evaluation of AODV and DSDV routing protocols for a FANET: Further results towards robotic vehicle networksAlejandro Garcia-Santiago, Josefina Castañeda-Camacho, José-Fermi Guerrero-Castellanos, Gerardo Mino Aguilar. 1-4 [doi]
• Off-line route planner based on resistive grid method for vehicle guidance in real-time applicationsG. Diaz-Arango, H. DeCos-Cholula, Luis Hernández-Martínez, F. Castro-Gonzalez, R. Ruiz-Gomez, Hector Vazquez-Leal. 1-4 [doi]
• Sub-1 volt class AB amplifier with low noise, ultra low power, high-speed, using winner-take-allAli Far. 1-4 [doi]
• Mathieu functions for DFT filter bank spectrum sensingLyda V. Herrera, Gordana Jovanovic-Dolecek, Alfonso Fernández-Vázquez. 1-4 [doi]
• High sensitivity GMI gradiometer with an active interference compensation systemPedro A. D. Riveros, Eduardo C. Silva. 1-4 [doi]
• A high-accuracy capacitance-to-time converter for capacitive sensorsSatomi Ogawa, Takahide Sato. 1-4 [doi]
• Analysis of packet arrival model for 802.11 protocol under hidden terminals and asynchronous MPR detectionLaura Medina-Marin, Ramón Parra-Michel, Aldo G. Orozco-Lugo, M. Mauricio Lara. 1-4 [doi]
• An approach a new 1 V supply resistorless voltage reference using Schottky diodeDalton M. Colombo, Thaironi M. de Brito, Flavius Vinicius A. Coimbra. 1-4 [doi]
• Experimental analysis of microstrip antennas using techniques to improve the bandwidthJ. Martinez Moreno, Agustín Santiago Medina-Vázquez, Carlos Alberto Bonilla Barragán, José M. Arce-Zavala, J. M. Villegas Gonzalez. 1-4 [doi]
• Low loss air channel modulator for ultra high frequency operationGabriel Lobao Fre, Felipe Beltran-Mejia, Tales Cleber Pimenta, Danilo H. Spadoti. 1-3 [doi]
• High-resolution ADCs design in sensorsHua Fan, Jingxuan Yang, Franco Maloberti, Quanyuan Feng, Dagang Li, Daqian Hu, Yuanjun Cen, Hadi Heidari. 1-4 [doi]
• Evaluating the cost to cipher the NoC communicationBruno S. Oliveira, Rafael Reusch, Henrique Martins Medina, Fernando Moraes. 1-4 [doi]
• A new randomness-enhancement method for chaos-based cryptosystemMiguel Garcia-Bosque, A. Perez-Resa, Carlis Sánchez-Azqueta, Santiago Celma. 1-4 [doi]
• Co-design system for template matching using dedicated co-processor and modified elephant herding optimizationAlexandre de Vasconcelos Cardoso, Nadia Nedjah, Luiza de Macedo Mourelle, Yuri Marchetti Tavares. 1-4 [doi]
• Runtime creation of continuous secure zones in many-core systems for secure applicationsLuciano L. Caimi, Vinicius Fochi, Eduardo Wächter, Fernando Gehm Moraes. 1-4 [doi]
• Modeling of microstrip interconnects with cylindrical sub-conductorsC. H. Rodriguez, J. L. Naredo, Omar Longoria-Gandara, Ramón Parra-Michel. 1-4 [doi]
• gem5-FIM: a flexible and scalable multicore soft error assessment framework to early reliability design space explorationsFelipe Rocha da Rosa, Ricardo Reis, Luciano Ost. 1-4 [doi]
• A simplified reference proximity integrated circuit card for HF RFIDShrief Rizkalla, Ralph Prestros, Christoph F. Mecklenbräuker. 1-4 [doi]
• Jitter tolerance acceleration using the golden section optimization techniqueAndres Viveros-Wacher, Ricardo Baca-Baylon, Francisco E. Rangel-Patino, Miguel A. Davalos-Santana, Edgar-Andrei Vega-Ochoa, José Ernesto Rayas-Sánchez. 1-4 [doi]
• On the calculation reuse in hadamard-based SATDMarcio Monteiro, Ismael Seidel, José Luís Güntzel. 1-4 [doi]
• Text encryption device based on a chaotic random bit generatorAngelos Giakoumis, Christos K. Volos, Jesús Manuel Muñoz-Pacheco, Luz del Carmen Gómez-Pavón, Ioannis N. Stouboulos, Ioannis M. Kyprianidis. 1-5 [doi]
• On TLM traffic accuracy: A multifractal perspectiveJose Eduardo Chiarelli Bueno Filho, Wang Jiang Chau. 1-4 [doi]
• Class AB amplifier with noise reduction, speed boost, gain enhancement, and ultra low powerAli Far. 1-4 [doi]
• CMOS analog front-end IC for EEG applications with high powerline interference rejectionJorge Augusto Costa, Tales Cleber Pimenta. 1-4 [doi]
• Variability-aware design method for a constant inversion level bias current generatorG. Antunez-Calistro, M. Siniscalchi, F. Silveira, Conrado Rossi-Aicardi. 1-4 [doi]
• CMOS analog multiplier with high rejection of power supply rippleFernando Martins Cardoso, Márcio Cherem Schneider, Edson Pinto Santana. 1-4 [doi]
• Minimum multiplier-delay 4D digital filterM. T. Kousoulis, C. A. Coutras, G. E. Antoniou. 1-4 [doi]
• An automated methodology to fix electromigration violations on a customized design flowLucas de Paris, Ricardo Reis. 1-4 [doi]
• A resource efficient symbol synchronizer implementation for the IEEE 802.11 protocolL. Orozco-Galvan, Ramón Parra-Michel, F. Peña-Campos, Rodrigo Jaramillo-Ramirez, Eduardo Romero-Aguirre. 1-4 [doi]
• Mathematical model for glitch power consumption to study its implication on power analysis attacksAli Shiri Sichani, Wilfrido A. Moreno. 1-4 [doi]
• Apparent power control in single-phase grids using SCES devices: An IDA-PBC approachOscar Danilo Montoya, Alejandro Garces Ruiz, Fedrico M. Serra, Guillermo Magaldi. 1-4 [doi]
• The functional verification of a satellite transponderVinicius Martins, Jerson Paulo Guex, Luciana Shiroma Montali, Wang Jiang Chau. 1-4 [doi]
• ALPR character segmentation algorithmAriel Oroz De Gaetano, Martin Di Federico, Ariel Arelovich. 1-4 [doi]
• Gate drive losses reduction in switched-capacitor DC-DC convertersFrancisco Veirano, Pablo Perez-Nicoli, Pablo Castro-Lisboa, Fernando Silveira. 1-4 [doi]
• Chaos-based stream cipher for gigabit ethernetA. Perez-Resa, Miguel Garcia-Bosque, Carlis Sánchez-Azqueta, Santiago Celma. 1-4 [doi]
• Embedded bus switches on 3D data bus for critical access time reductionChia-Chun Tsai. 1-4 [doi]
• Design and construction of dual-mode micro-strip resonator filters for the 950-1, 450 MHz band: Application as IF filters in microwave transceiversLuis A. Rodriguez-Meneses, Celso Gutiérrez-Martínez, Jacobo Meza-Perez, J. Alfredo Torres-Fortiz, Roberto S. Murphy-Arteaga. 1-4 [doi]
• A readout concept for AC-driven xMR sensors in automotive wheel speed applicationsMarcus Prochaska, Kris Rohrmann, Marvin Sandner, Phil Meier, Frank Freund. 1-4 [doi]
• Educational design kit for synopsys tools with a set of characterized standard cell libraryYao-Ming Kuo, Leandro J. Arana, Luis Seva, Cristian Marchese, Leandro Tozzi. 1-4 [doi]
• High-precision self-compensated fully-integrated CMOS LDO regulatorF. Montalvo-Galicia, María Teresa Sanz-Pascual, Belén Calvo López. 1-4 [doi]
• A nonlinear placement for FPGAs: The chaotic placeElias de Almeida Ramos, Guilherme Bontorin, Ricardo Reis. 1-4 [doi]
• Design and optimisation of a cascode low noise amplifier (LNA) using MOST scattering parameters and gm/ID ratioJuan Luis Castagnola, Hugo Garcia-Vazquez, Fortunato Carlos Dualibe. 1-4 [doi]
• Reliability evaluation of circuits designed in multi- and single-stage versionsR. B. Schvittz, M. Pontes, Cristina Meinhardt, Denis Teixeira Franco, Lirida A. B. Naviner, L. S. da Rosa, Paulo F. Butzen. 1-4 [doi]
• An accurate analysis method for complex IC analog neural network-based systems using high-level software toolsA. Martinez-Nieto, Nicolás Medrano, María Teresa Sanz-Pascual, B. Calvo. 1-4 [doi]
• Fast and energy-efficient HEVC transrating based on frame partitioning inheritanceThiago Bubolz, Ruhan Conceicao, Mateus Grellert, Bruno Zatt, Luciano Volcan Agostini, Guilherme Corrêa. 1-4 [doi]
• An analysis of on-silicon-via stacks in RF-CMOS processesCarlos Alberto Sanabria Diaz, Monico Linares Aranda. 1-4 [doi]
• A novel state assignment method for XBM AFSMs without the essential hazard assumptionDuarte L. Oliveira, Tiago Curtinhas, Lucas M. Santana, Lester de Abreu Faria. 1-4 [doi]
• A 2.45 GHz CMOS active quasi-circulator with a built-in rectifierKarolinne B. Brito, Robson Nunes de Lima, Volker Kible, Raimundo C. S. Freire. 1-4 [doi]
• Identifying power consumption signatures in LTE conformance tests using machine learningSidartha A. L. Carvalho, Lucas M. F. Harada, Rafael N. Lima, Carolina M. A. Barbosa, Daniel C. Cunha, Abel G. Silva-Filho. 1-4 [doi]
• Energy consumption improvement based on adaptive FEC code in elastic optical networkS. Y. M. Bandiri, F. R. R. Marante, Tales Cleber Pimenta, Danilo H. Spadoti. 1-4 [doi]
• Energy-based voice activity detection algorithm using Gaussian and Cauchy kernelsAminadabe dos S. P. Soares, Wemerson D. Parreira, Everton G. Souza, Sérgio J. M. de Almeida, Cláudio Machado Diniz, Chiara D. Nascimento, Matheus F. Stigger. 1-4 [doi]
• A baseline restorer for charge-sensitive amplifiers in a 500-nm CMOS processAngel Abusleme, Renzo Barraza, Sergey Kuleshov. 1-4 [doi]
• An 8-bit 3.2GS/S CMOS time-interleaved SAR ADC with non-buffered input demultiplexingBenjamin T. Reyes, Laura Biolato, Agustin C. Gaietto, Leandro Passetti, Fredy Solisi, Mario R. Hueda. 1-4 [doi]
• Novel two-stage comb filter for multiple-of-three decimation factorsGordana Jovanovic-Dolecek, R. Flores Rodrigues. 1-4 [doi]
• Error coded affine projection-like algorithm with evolving order and variable resolution for acoustic echo cancellationE. I. Rodriguez, J. G. Avalos, J. C. Sánchez. 1-4 [doi]
• Stochastic resonance in bang-bang phase detector gain and the impact on CDR lockingJavier Ardila, Elkim Roa. 1-4 [doi]
• Continuous time full-feedforward MASH 2-2 architecture for sigma-delta modulatorsWalter Jose Lancioni, Fortunato Carlos Dualibe, Pablo A. Petrashin, Luis E. Toledo, Carlos Vazquez. 1-4 [doi]
• FPGA implementation of high-performance asynchronous pipelines with robust controlDuarte L. Oliveira, Kledermon Garcia, Lucas M. Santana, Lester de Abreu Faria. 1-4 [doi]
• Sense amplifier offset cancellation and replica timing calibration for high-speed SRAMsRoman Fragasse, Brian Dupaix, Ramy Tantawy, Todd James, Waleed Khalil. 1-5 [doi]
• Design of a low-cost and high-performance digital PWM controller for DC-DC convertersFilipe Guimarães Russo Ramos, Tales Cleber Pimenta, Luis Henrique de Carvalho Ferreira. 1-4 [doi]
• Frequency-domain interpolation for simultaneous periodic nonuniform samplesMarco Antonio Gurrola-Navarro. 1-4 [doi]
• A novel current-based CCD clock driverBraulio Cancino, Angel Abusleme. 1-4 [doi]
• Resistive switching phenomenon in graphene oxide doped with copper devicesMarina Sparvoli, Mario Gazziro. 1-4 [doi]
• Effect of the design space sampling on the design performancesMouna Kotti, Mourad Fakhfakh, Esteban Tlelo-Cuautle. 1-4 [doi]
• A 1V-1.75μW Gm-C low pass filter for bio-sensing applicationsJorge Pérez-Bailón, A. Márquez, B. Calvo, Nicolás Medrano, María Teresa Sanz-Pascual. 1-4 [doi]
• On real-time implementation of the BNLMS algorithm using the SHARC ADSP-21489Roberto M. Passos, Gabriel B. B. Ribeiro, Maike M. Muzitano, Lucas B. Nazareth, José Antonio Apolinário, Antonio L. L. Ramos. 1-4 [doi]
• Highly-linear transimpedance amplifier for remote antenna unitsGuillermo Royo, Carlis Sánchez-Azqueta, Concepción Aldea, Santiago Celma, Cecilia Gimeno. 1-4 [doi]
• Low-power embedded readout and processing system for ISFET sensors as measurement devicesLuighi A. Viton Zorrilla, Jinmi Lezama. 1-4 [doi]
• Low-power half-rate dual-loop clock-recovery system in 28-nm FDSOICecilia Gimeno, Denis Flandre, David Bol. 1-4 [doi]
• A 64-channel wireless EEG recording system for wearable applicationsMartin Causa, Franco La Paz, Santiago Radi, Juan P. Oliver, Leonardo Steinfeld, Julian Oreggioni. 1-4 [doi]
• Impedance vs coupling noise analysis and tradeoff on power delivery filters based on package layout interconnectionsJose L. Silva-Perales, Daniel Garcia Garcia, Carlos J. Franco-Tinoco. 1-4 [doi]
• Maze-solving with a memristive grid of charge-controlled memristorsArturo Sarmiento-Reyes, Yojanes Rodriguez-Velasquez. 1-4 [doi]