Abstract is missing.
- PIM-Potential: Broadening the Acceleration Reach of PIM ArchitecturesJohnathan Alsop, Shaizeen Aga, Mohamed Assem Ibrahim, Mahzabeen Islam, Nuwan Jayasena, Andrew McCrabb. 1-12 [doi]
- Pimacolaba: Collaborative Acceleration for FFT on Commercial Processing-In-Memory ArchitecturesMohamed Assem Ibrahim, Shaizeen Aga. 13-25 [doi]
- PIMSys: A Virtual Prototype for Processing in MemoryDerek Christ, Lukas Steiner, Matthias Jung 0001, Norbert Wehn. 26-33 [doi]
- Sadram Arithmetic in C++Robert Trout, David Lynch. 34-37 [doi]
- Characterization and Design of 3D-Stacked Memory for Image Signal Processing on AR/VR DevicesLita Yang, Changjung Kao, Sriseshan Srikanth, Huseyin Ekin Sumbul, Tony F. Wu, Huichu Liu, Edith Beigné. 38-44 [doi]
- Data Prefetching on Processors with Heterogeneous MemoryBerk Saglam, Nam Ho, Carlos Falquez, Antoni Portero, Fabian Schätzle, Estela Suarez, Dirk Pleiter. 45-60 [doi]
- UpDown: A Novel Architecture for Unlimited Memory ParallelismAndronicus Rajasukumar, Tianchi Zhang 0005, Ruiqi Xu, Andrew A. Chien. 61-77 [doi]
- SMS: Solving Many-sided RowHammerSamiksha Verma, Virendra Singh. 78-88 [doi]
- PROLONG: Priority based Write Bypassing Technique for Longer Lifetime in STT-RAM based LLCPrabuddha Sinha, Krishna Pratik BV, Shirshendu Das, Venkata Kalyan Tavva. 89-103 [doi]
- CARDR: DRAM Cache Assisted Ransomware Detection and Recovery in SSDsWaqar Hassan Mir, Neeraj Goel, Venkata Kalyan Tavva. 104-115 [doi]
- ZipCache: A DRAM/SSD Cache with Built-in Transparent CompressionRui Xie 0003, Linsen Ma, Alex Zhong, Feng Chen, Tong Zhang 0001. 116-128 [doi]
- Measuring Data Access Latency in Large CPU CachesShaotong Sun, Yifan Zhu, Xingzhi Ye, Chen Ding 0001. 129-139 [doi]
- Implementation of a Two-Level Programmable Cache Emulation and Test SystemMarcus Figorito, Vincent Michelini, Benjamin Reber, Alexander H. Kneipp, Matthew Gould, Chen Ding, Linlin Chen, Dorin Patru. 140-156 [doi]
- Contention aware DRAM caching for CXL-enabled pooled memoryChandrahas Tirumalasetty, Narasimha Reddy Annapareddy. 157-171 [doi]
- Performance Study of CXL Memory TopologyJianbo Wu, Jie Liu, Gokcen Kestor, Roberto Gioiosa, Dong Li 0001, Andres Marquez. 172-177 [doi]
- Synchronization for CXL Based MemoryJoshua Suetterlein, Joseph B. Manzano, Andres Marquez. 178-185 [doi]
- Programming the Future: the Essential Role of System Topology Awareness in Heterogeneous Disaggregated EnvironmentsBeatrice Branchini, Ian Di Dio Lavore, Vito Giovanni Castellana, Marco D. Santambrogio. 186-191 [doi]
- Using Isoefficiency as a Metric to Assess Disaggregated Memory Systems for High Performance ComputingAnusha Devulapally, Mahantesh Halappanavar, Amit Puri, Vijaykrishnan Narayanan, Andres Marquez. 192-197 [doi]
- Studying CPU and memory utilization of applications on Fujitsu A64FX and Nvidia Grace SuperchipYan Kang, Sayan Ghosh, Mahmut T. Kandemir, Andrés Márquez. 198-207 [doi]
- A comparison of modern memory management schemes in HPCSina Karimi, Kurt Keville. 208-209 [doi]
- To Cache or not to Cache? Exploring the Design Space of Tunable, HLS-generated AcceleratorsClaudio Barone, Rishika Kushwah, Ankur Limaye, Vito Giovanni Castellana, Giovanni Gozzi, Michele Fiorito, Fabrizio Ferrandi, Antonino Tumeo. 210-218 [doi]
- A Workflow for the Synthesis of Irregular Memory Access MicrobenchmarksKevin Sheridan, Jered Dominguez-Trujillo, Galen M. Shipman, Patrick Lavin, Christopher Scott, Agustin Vaca Valverde, Richard W. Vuduc, Jeffrey Young 0001. 219-234 [doi]
- Static Reuse Profile Estimation for Array ApplicationsAbdur Razzak, Atanu Barai, Nandakishore Santhi, Abdel-Hameed A. Badawy. 235-244 [doi]
- Memory Efficiency Oriented Fine-Grain Representation and Optimization of FFTSalvatore Servodio, Xiaoming Li. 245-256 [doi]
- Hybrid Cache Design Under Varying Power Supply Stability - A Comparative StudyNils Wilbert, Stefan Wildermann, Jürgen Teich. 257-269 [doi]
- MemFriend: Understanding Memory Performance with Spatial-Temporal AffinityYasodha Suriyakumar, Nathan R. Tallent, Andres Marquez, Karen L. Karavanic, Ozgur O. Kilic. 270-284 [doi]