Abstract is missing.
- Rethinking Memory System Design (along with Interconnects)Onur Mutlu. 1 [doi]
- System-Level Analysis of Network Interfaces for Hierarchical MPSoCsJohannes Ax, Gregor Sievers, Martin Flasskamp, Wayne Kelly, Thorsten Jungeblut, Mario Porrmann. 3-8 [doi]
- A Low-Latency and High-Throughput Multiple-Level Arbitration Scheme Supporting Quality-of-Service in Optical On-chip NetworkJie Jian, Mingche Lai, Liquan Xiao. 9-14 [doi]
- Design of TSV-Sharing Topologies for Cost-Effective 3D Networks-on-ChipPoona Bahrebar, Dirk Stroobandt. 15-20 [doi]
- NoCVision: A Network-on-Chip Dynamic Visualization SolutionVaibhav Gogte, Doowon Lee, Ritesh Parikh, Valeria Bertacco. 21-26 [doi]
- Task mapping and communication routing model for minimizing power consumption in multi-coresSergiu Carpov. 27-32 [doi]
- Automated Power and Latency Management in Heterogeneous 3D NoCsAwet Yemane Weldezion, Masoumeh Ebrahimi, Masoud Daneshtalab, Hannu Tenhunen. 33-38 [doi]
- Methodology to verify, debug and evaluate performances of NoC based interconnectsPatrick Oury, Nick Heaton, Stewart Penman. 39-42 [doi]