Table of Contents

• nd-order allpass filters on 130nm CMOSPeyman Ahmadi, Hossein H. Taghavi, Leonid Belostotski, Arjuna Madanayake. 1-4 [doi]
• Welcome to MWSCAS 2013Steven B. Bibyk, Carla Purdy, Mohammed Ismail. 1 [doi]
• A 1µA bandgap-less programmable voltage regulatorHector X. Roman, Guillermo J. Serrano. 5-8 [doi]
• A 5.3µA quiescent current fully-integrated low-dropout (LDO) regulator with Transient Recovery Time EnhancementPaul M. Furth, Srikar Krishnapurapu, Sri Harsh Pakala, Mohammad A. Haque. 9-12 [doi]
• Arithmetic circuits using new single-phase partially-adiabatic logic familyMihail Cutitaru, Lee A. Belfore. 13-16 [doi]
• Sleep Convention Logic using partially slept function blocksParviz Palangpour, Scott C. Smith. 17-20 [doi]
• A low power UART design based on asynchronous techniquesDipanjan Bhadra, Vikas S. Vij, Kenneth S. Stevens. 21-24 [doi]
• A power-efficient asynchronous circuit style with selective input-channel restoringChin-Khai Tang, Yi-Chang Lu. 25-28 [doi]
• Low power Null Convention Logic circuit design based on DCVSLHo-Joon Lee, Yong-Bin Kim. 29-32 [doi]
• High-frequency high-efficiency resonant converter with class-EM inverter and class-E rectifierHiroo Sekiya, Xiuqin Wei, Tomoharu Nagashima. 33-36 [doi]
• Inductor design for PWM buck converter operated as dynamic supply or amplitude modulator for RF transmittersThomas R. Salvatierra, Marian K. Kazimierczuk. 37-40 [doi]
• Reverse power flow study of an isolated Quasi-Switched-Capacitor DC/DC converter for automotive applicationsXuan Zhang, Chengcheng Yao, Feng Guo, Jin Wang. 41-44 [doi]
• Analysis of the doubler of electricity considering a resistive loadAntônio Carlos M. de Queiroz, Marcelo Domingues. 45-48 [doi]
• Steady-state analysis of PWM quadratic buck converter in CCMAgasthya Ayachit, Marian K. Kazimierczuk. 49-52 [doi]
• SPICE model of memristor and its applicationKaida Xu, Yonghong Zhang, Lin Wang, William T. Joines, Qing Huo Liu. 53-56 [doi]
• A novel analytical negative resistor compact modelIsaac Abraham. 57-60 [doi]
• Improved spherical continuation algorithm by nonlinear circuitDelia Torres-Muñoz, Luis Hernández-Martínez, Hector Vazquez-Leal. 61-64 [doi]
• Model order reduction using overcomplete damped sinusoid dictionary and sparse codingMohamed Waleed Fakhr, Yasser Hanafy. 65-68 [doi]
• Biquadratic approximation of fractional-order Laplacian operatorsReyad el-Khazali. 69-72 [doi]
• Thermally controlled vanadium dioxide thin film microwave devicesG. Subramanyam, E. Shin, D. Brown, H. Yue. 73-76 [doi]
• Silicon on ferroelectric insulator field effect transistor (SOF-FET) for ultra low power designAzzedin D. Es-Sakhi, Masud H. Chowdhury. 77-80 [doi]
• Variability robustness enhancement for 7nm FinFET 3T1D-DRAM cellsEsteve Amat, Carmen G. Almudéver, Nivard Aymerich, A. Rubio, Ramon Canal. 81-84 [doi]
• Understanding the impact of slow electro-forming in Resistive Random Access MemoriesBranden Long, Saptarshi Mandal, Rashmi Jha, Alexander Pronin, Peter J. Hulbert. 85-88 [doi]
• Design of voltage reference with low sensitivity to process, supply voltage and temperature variationsVinayak Gopal Hande, Maryam Shojaei Baghini. 89-92 [doi]
• Analysis and design of sub-μW bandgap references in nano-meter CMOSKin Keung Lee, Tor Sverre Lande. 93-96 [doi]
• A bandgap voltage reference in 0.18µm CMOS technologyA. Martinez-Nieto, M. T. Sanz-Pascual, P. Rosales-Quintero, Santiago Celma. 97-100 [doi]
• A bandgap circuit with a temperature coefficient adjustment blockEder Issao Ishibe, Joao Navarro Soares Junior. 101-104 [doi]
• Modified integrated circuit interface based on M×N-ary variable width period modulationShengyang He, MaoLiu Lin, Guanghui Ren. 105-108 [doi]
• Energy-aware schedule optimization on multicore systemsHassan Salamy, Semih Aslan. 109-112 [doi]
• Reliability assessment of combinational logic using first-order-only fanout reconvergence analysisSamuel N. Pagliarini, Tian Ban, Lirida A. B. Naviner, Jean-François Naviner. 113-116 [doi]
• Hardware and software design for QR Decomposition Recursive Least Square algorithmSufeng Niu, Sizhou Wang, Semih Aslan, Jafar Saniie. 117-120 [doi]
• Reliable ultra-low voltage cache with variation-toleranceCheng Li 0011, Meilin Zhang, Paul Ampadu. 121-124 [doi]
• A synchronous LED driver with dynamic level-shifting and simultaneous peak & valley current sensing for high-brightness lighting applicationsZhidong Liu, Hoi Lee. 125-128 [doi]
• Fully-integrated passive threshold-compensated PMOS rectifier for RF energy harvestingZohaib Hameed, Kambiz Moez. 129-132 [doi]
• Regenerative electrostatic energy harvester with improved output power rangeYin Li, Manjusri Misra, Stefano Gregori. 133-136 [doi]
• An external capacitor-less low drop-out regulator with superior PSR and fast transient responseSaikrishna Ganta, Chang-Joon Park, Daniel Gitzel, Rafael Rivera, José Silva-Martínez. 137-140 [doi]
• Push-pull RC-oscillator/multivibratorIgor M. Filanovsky, Jani K. Jarvenhaara, Nikolay T. Tchamov. 141-144 [doi]
• RLC-oscillator with smooth transition from sinusoidal to relaxation oscillationsIgor M. Filanovsky, Chris J. M. Verhoeven. 145-148 [doi]
• Circuits with mixed mode oscillations in VHDL-AMSWieslaw Marszalek, Michal Melosik. 149-152 [doi]
• Simulative characterization of the stability for second order voltage switched CP-PLLEhsan Ali, Wenceslas Rahajandraibe, Fayrouz Haddad, Christian Hedayat, Christian Hangmann. 153-156 [doi]
• Variability analysis of tent map-based chaotic-map truly random number generatorsHamid Nejati, Ahmad Beirami, Aria Ghasemian Sahebi, Warsame H. Ali. 157-160 [doi]
• A low-power low-noise transimpedance amplifier for an integrated biosensing platformKhandaker A. Al Mamun, Mohammad Habib Ullah Habib, Nicole McFarlane. 161-164 [doi]
• A 7.8V neurostimulator based on cascoded low-voltage Silicon-on-Sapphire MOS transistorsCesar Rodrigues, Asish Zac Alex, Torsten Lehmann. 165-168 [doi]
• A TDC-based front-end for rapid impedance spectroscopyHao Huang, Samuel Palermo. 169-172 [doi]
• A high input impedance low-noise instrumentaion amplifier with JFET inputTan Yang, Junjie Lu, Jeremy Holleman. 173-176 [doi]
• Double gate FinFET based mixed-signal design: A VCO case studyDhruva Ghai, Saraju P. Mohanty, Garima Thakral. 177-180 [doi]
• Two-dimensional eye-opening monitor for serial linksAlaa R. Al-Taee, Fei Yuan, Andy Ye. 181-184 [doi]
• Source follower: A misunderstood humble circuitIgor M. Filanovsky, Jani K. Jarvenhaara, Nikolay T. Tchamov. 185-188 [doi]
• A low power CMOS integrated circuit for differential capacitive measurementFatemeh Aezinia, Behraad Bahreyni. 189-192 [doi]
• Fourier transformation on an optically reconfigurable gate arrayHiroyuki Ito, Minoru Watanabe. 193-196 [doi]
• CCII based KHN fractional order filterAhmed Soltana, Ahmed G. Radwanb, Ahmed M. Solimanc. 197-200 [doi]
• Passive component stacking to aid power supply decouplingChristopher Benedik, Saiyu Ren. 201-204 [doi]
• An elliptic filter based on MLF LF structure for wireless receiverXi Zhu 0001, Yichuang Sun. 205-208 [doi]
• Current-mode high-frequency wavelet filter based on leap-frog multiple-loop feedback structureWenshan Zhao, Yichuang Sun. 209-212 [doi]
• A digital bandgap referenceAdriana Becker-Gomez, Antonio F. Mondragón-Torres, Venkatesh Acharya, Bhaskar Banerjee, Thayamkulangara R. Viswanathan. 213-216 [doi]
• A CMOS inverse Chebyshev channel selection filter for extravehicular activity (EVA) radio receiversJesús Efraín Gaxiola Sosa, Hajir Hedayati, Pengcheng Lv, Kamran Entesari. 217-220 [doi]
• Reconfigurable analog signal processing for wireless sensor networksBrandon M. Kelly, Brandon Rumberg, David W. Graham, Vinod Kulathumani. 221-224 [doi]
• Design of a sub-picosecond-jitter delay-lock-loop for interleaved ADC sample clock synthesisJohn A. McNeill, Jianping Gong, Rabeeh Majidi. 225-228 [doi]
• A very high energy-efficiency switching technique for SAR ADCsArindam Sanyal, Nan Sun. 229-232 [doi]
• An analog-design assistant tool and an example of its applicationDelaram Shahhosseini, M. Hossein Taghavi, Laleh Behjat, Leonid Belostotski. 233-236 [doi]
• Single slope/SAR column-parallel ADC with mixed-signal error correctionFang Tang, Yuan Cao 0003, Xiaojin Zhao. 237-240 [doi]
• Study of a cosmic ray impact on combinatorial logic circuits of an 8bit SAR ADC in 65nm CMOS technologyDaniel Gomez Toro, Fabrice Seguin, Matthieu Arzel, Michel Jézéquel. 241-244 [doi]
• Feasibility analysis of the fixed-width pulse RZ feedback to reduce clock jitter effects in lowpass continuous-time ΔΣ modulatorsHairong Chang, Hua Tang. 245-248 [doi]
• A 13-bit 200MS/s PIPELINE ADC in 0.13µm CMOSJunfeng Gao, Bo Chen, Guangjun Li, Qiang Li. 249-252 [doi]
• Column-parallel continuous-time ΣΔ ADC with implicit front-end variable gain amplifierFang Tang, Yuan Cao 0003, Xiaojin Zhao. 253-256 [doi]
• High performance SAR ADC with offset and noise toleranceJunfeng Gao, Guangjun Li, Qiang Li. 257-260 [doi]
• A 0.25V 97.8fJ/c.-s. 86.5dB SNDR SC ΔΣ modulator in 0.13µm CMOSZhiliang Qiao, Xiong Zhou, Qiang Li. 261-264 [doi]
• A Winner-Take-All circuit with improved accuracy and tolerance to mismatch and process variationsGopalakrishnan Sundararajan, Chris Winstead. 265-268 [doi]
• Elimination of false codes in an asynchronous parallel successive approximation A/D converterSriram Venkataraman, Paul M. Furth, Sri Harsh Pakala. 269-272 [doi]
• Structure of quasi optimal algorithm for analogue circuit optimizationAlexander Zemliak, Fernando Reyes-Cortés, Jaime Cid, Sergio Vergara. 273-276 [doi]
• Fast statistical process variation analysis using universal Kriging metamodeling: A PLL exampleOghenekarho Okobiah, Saraju P. Mohanty, Elias Kougianos. 277-280 [doi]
• th order continuous time band-pass Sigma Delta Analog to Digital modulator with active inductor based resonatorsKevin Dobson, Shahrokh Ahmadi, Mona E. Zaghloul. 281-284 [doi]
• A large-scale FPAA enabling adaptive floating-gate circuitsStephen Brink, Jennifer Hasler, Richard B. Wunderlich. 285-288 [doi]
• Design strategy for enhanced output impedance current-steering DAC in sigma-delta convertersAstria Nur Irfansyah, Torsten Lehmann, Julian Jenkins, Tara Julia Hamilton. 289-292 [doi]
• Method for designing integrated charge pumps with maximum conversion efficiencyStefano Gregori, Thomas Mallard. 293-296 [doi]
• Discrete-time model and control system for integrated charge pumpsThomas Mallard, Stefano Gregori. 297-300 [doi]
• A temperature and process insensitive CMOS reference current generatorShiva Sai Bethi, Kye-Shin Lee, Robert J. Veillette, Joan Carletta, Mike Willett. 301-304 [doi]
• A multi-piecewise curvature-corrected technique for bandgap reference circuitsYi Huang 0004, Chun Cheung, Laleh Najafizadeh. 305-308 [doi]
• Enhanced event-driven modeling of a CP-PLL with nonlinearities and nonidealitiesChristian Hangmann, Christian Hedayat, Ulrich Hilleringmann. 309-312 [doi]
• Power generation capability of CMOS image sensors with on-chip energy harvesting pixelsIsmail Cevik, Suat U. Ay, Jiacheng Wang, Mei Yan. 313-316 [doi]
• Spatio-temporal tunable pixels for multi-spectral infrared imagersGlauco Rogerio Cugler Fiorante, Payman Zarkesh-Ha, Javad Ghasemi, Sanjay Krishna. 317-320 [doi]
• Reconfiguration costs in analog sensor interfaces for wireless sensing applicationsBrandon Rumberg, David W. Graham. 321-324 [doi]
• Accurate sensor readout circuitry for reliability measurement of hermetically sealed chip-scale biomedical implantsKushal Das, Torsten Lehmann, Cesar Rodrigues. 325-328 [doi]
• A low-power, high-linearity filter bank for auditory signal processing microsystemYingkan Lin, Milutin Stanacevic. 329-332 [doi]
• Molecular electronic structure of nanodiatomic metal oxideMahmoud Korek, Hana Abdel Nabi, Nayla El-Kork. 333-337 [doi]
• Gold nanoplot hot spots simulation and imagingNayla El-Kork, Feiran Lei, Mohammed Ismail Elnaggar, Paul Moretti, Bernard Jacquier. 338-339 [doi]
• Near-threshold CNTFET SRAM cell design with gated cell power supplyZhe Zhang, José G. Delgado-Frias. 340-343 [doi]
• Characterization of carbon nanofibers (CNFs) for glucose based biosensor applicationHasina F. Huq, E. M. Pinon, M. Braden, J. Acuna. 344-347 [doi]
• Enhancing static noise margin while reducing power consumptionAzam Beg, Amr Elchouemi. 348-351 [doi]
• A cross-regulation-free triple-output switched-capacitor DC-DC regulator for energy-harvesting applicationsZhe Hua, Hoi Lee. 352-355 [doi]
• A switched-capacitor DC-DC converter using delta-sigma digital pulse frequency modulation control methodYongsuk Choi, HeungJun Jeon, Yong-Bin Kim. 356-359 [doi]
• High-efficiency, high-dimming ratio LED driverPunith R. Surkanti, Paul M. Furth. 360-363 [doi]
• Silicon-integrated electrostatic energy harvestersAsantha Kempitiya, Mona Mostafa Hella, John Oxaal, Diana-Andra Borca-Tasciuc. 364-367 [doi]
• CMOS photovoltaic-cell layout configurations for harvesting microsystemsRajiv Damodaran Prabha, Gabriel A. Rincón-Mora. 368-371 [doi]
• A 0.1-1.5GHz dual-mode Class-AB/Class-F power amplifier in 65nm CMOSYun Yin, Baoyong Chi, Zhihua Wang. 372-375 [doi]
• A Class-C amplifier linearized by a constant conduction angle biasing circuitGursewak S. Rai, Vladimir I. Prodanov, Stephen Garber. 376-379 [doi]
• Steady-state analysis and fast optimisation of Class-E power amplifiers with lossy switch for RF choke and finite DC-feed inductanceJunqing Guan, Renato Negra. 380-383 [doi]
• An iterative calibration technique for LINC transmitterZhiwen Zhu, Xinping Huang. 384-387 [doi]
• Design of fractional notch filter with asymmetric slopes and large values of notch magnitudeAkshay Marathe, Brent Maundy, Ahmed S. Elwakil. 388-391 [doi]
• Experimental validation of a microcontroller-based wireless device to quantify head impactsZakaria Al-Deneh, Dhanashree Ambekar, Triet Dao, Alexander L. Dziech, Vignesh Subbian, Fred R. Beyette. 392-395 [doi]
• Design of a capacitance sensor in 0.18um CMOS technology for biomedical applicationRoyce Quintana, Adelina Sequra, Kern Tucker, Tom Chen. 396-399 [doi]
• Rapid quantification system for zinc in blood serumBenjamin Zerhusen, Geethanga de Silva, Xing Pei, Ian Papautsky, Fred R. Beyette. 400-403 [doi]
• Vehicle parameter estimation using nested RLS algorithmGurunath Kedar-Dongarkar, Manohar Das. 404-407 [doi]
• Cipher-destroying and secret-key-emitting hardware Trojan against AES coreTakeshi Kumaki, Masaya Yoshikawa, Takeshi Fujino. 408-411 [doi]
• Testing reversible adder/subtractor for missing control pointsSayeeda Sultana, Katarzyna Radecka. 412-415 [doi]
• Reversible circuit synthesis using ACO and SA based Quine-McCluskey methodMayukh Sarkar, Prasun Ghosal, Saraju P. Mohanty. 416-419 [doi]
• Novel clock gating techniques for low power flip-flops and its applicationsMohamed O. Shaker, Magdy Bayoumi. 420-424 [doi]
• Low-power content-addressable memory design using a double match-line (DML) architectureYa-Chun Lin, Yen-Jen Chang, Tung-Chi Wu. 425-428 [doi]
• n+1 squarer design based on carbon nanotube technologyWeifu Li, Yong-Bin Kim. 429-432 [doi]
• High-speed J-delayed & K-dimensional LFSR architecture in VLSIChan-Bok Jeong, Young Ha Lee, Hyeon-Deok Bae. 433-436 [doi]
• Energy analysis and NoC design for heterogeneous MPSoC platform for a video applicationAmin Jarrah, Mohsin M. Jamali. 437-440 [doi]
• Energy modeling for mobile devices using performance countersSriram Sankaran, Ramalingam Sridhar. 441-444 [doi]
• FLNR: A fast light-weight NoC router for FPGAsAbdelrazag Imbewa, Mohammed A. S. Khalid. 445-448 [doi]
• Redundant C4 power pin placement to ensure robust power grid deliverySheldon Logan, Matthew R. Guthaus. 449-452 [doi]
• Boolean mask operations on parameterized 45-degree polygonsYao-I Tseng, I-Lun Tseng, Adam Postula. 453-456 [doi]
• Low power self-timed carry lookahead addersP. Balasubramanian, D. Dhivyaa, J. P. Jayakirthika, P. Kaviyarasi, K. Prasad. 457-460 [doi]
• Efficient state-dependent power model for multi-bit flip-flop banksJung Kyu Chae, Severine Bertrand, Pierre-Francois Ollagnon, Paul Mougeat, Jean-Arnaud Francois, Roselyne Chotin-Avot, Habib Mehrez. 461-464 [doi]
• Frequency uniqueness in ring oscillator Physical Unclonable Functions on FPGAsMuslim Mustapa, Mohammed Niamat, Mansoor Alam, Taylor Killian. 465-468 [doi]
• Static noise margin and power dissipation analysis of various SRAM topologiesPrajna Mishra, Eugene John, Wei-Ming Lin. 469-472 [doi]
• FPGA memory testing technique using BISTPriyanka Gadde, Mohammed Niamat. 473-476 [doi]
• Slope compensation and relative stability of peak current-mode controlled PWM dc-dc converters in CCMNisha Kondrath, Marian K. Kazimierczuk. 477-480 [doi]
• Robust compensation scheme for low power capacitor-less low dropout voltage regulatorDaniel Gitzel, Rafael Rivera, José Silva-Martínez. 481-484 [doi]
• Monitoring system for global solar radiation, temperature, current and power for a photovoltaic system interconnected with the electricity distribution network in BogotaRobinson Rodriguez Diaz, Andres Leonardo Jutinico Alarcon, Robinson Jiménez-Moreno. 485-488 [doi]
• Optimal tracking control for energy management systems in microgridsFernando Ornelas-Tellez, J. Jesus Rico Melgoza. 489-492 [doi]
• Two-phase buck converter as a dynamic power supply for RF power amplifier applicationsAgasthya Ayachit, Marian K. Kazimierczuk. 493-496 [doi]
• Engineering pulsed magnetic fields: Designing and building a pulsed magnetic field circuit for a faraday rotation experimental setupThomas Foulkes, Maarij Syed, Marc Herniter. 497-500 [doi]
• Remote calibration of wireless power harvestXiongliang Lai, Fei Yuan. 501-504 [doi]
• State-variable analysis of wireless power transfer networks for linear and nonlinear loadsDavid M. Beams, Anusha Papasani. 505-508 [doi]
• Design and simulation of networks for midrange wireless power transferDavid M. Beams, Varun Nagoorkar. 509-512 [doi]
• Development of a power conditioning circuit for railcar energy harvestingTianyun Guo, Ross Kerley, Dong Sam Ha. 513-516 [doi]
• Energy management design for smart homes using green technologyClaudio Talarico, Hyungtaek Chang, Anita Annamalai, Janet Roveda. 517-520 [doi]
• A 120dB input dynamic range, current-input current-output CMOS logarithmic amplifier with 230ppm/°K temperature sensitivityMing Gu, Shantanu Chakrabartty. 521-524 [doi]
• Bias-scalable inner-product approximation circuit using analog margin propagationMing Gu, Shantanu Chakrabartty. 525-528 [doi]
• Design of high speed high-voltage drivers based on stacked standard CMOS for various supply voltagesSara Pashmineh, Hongcheng Xu, Maurits Ortmanns, Dirk Killat. 529-532 [doi]
• A high-temperature comparator with rail-to-rail input voltage rangeBo Liu, Matthew Kollarits, Robert Veillette, Joan Carletta, Kye-Shin Lee. 533-536 [doi]
• A configurable fault-tolerant glitch-free clock switching circuitHaochi Wang, Yanlong Zhang, Xuewu Li, Lei Chen, Zhiping Wen 0001, Kun Zhang, Min Wang. 537-540 [doi]
• Asynchronous approach to ring oscillator for FPGA-based Physical Unclonable Function designRoshan Silwal, Mohammed Niamat, Muslim Mustapa. 541-544 [doi]
• Modeling of transient faults and fault-tolerant design in nanoelectronicsTian Ban, Jianxin Wang, Ting An, Lirida A. B. Naviner. 545-548 [doi]
• Soft error aware pipelined architecture: Leveraging automatic repeat request protocolPhani Balaji Swamy Tangellapalli, Syed Rafay Hasan. 549-552 [doi]
• Secure controllers: Requirements of S*FSMMike Borowczak, Ranga Vemuri. 553-557 [doi]
• Beyond-one-cycle loop delay CT ΔΣ modulators with proper rational NTF synthesis and time-interleaved quantizersFan Jiang, Chixiao Chen, Yuzhong Xiao, Jun Xu, Junyan Ren. 558-561 [doi]
• Power-efficient amplifier frequency compensation for continuous-time delta-sigma modulatorsDo-Yeon Yoon, Hae-Seung Lee, Jeffrey Gealow. 562-565 [doi]
• Band-pass continuous-time ΣΔ modulators with widely tunable notch frequency for efficient RF-to-digital conversionGerardo Molina Salgado, Gordana Jovanovic-Dolecek, José M. de la Rosa. 566-569 [doi]
• A 1.2 mW 67.5 dB SQDR VCO-based ΣΔ ADC with Non-linearity Cancellation TechniqueRohit Yadav, Nan Sun. 570-573 [doi]
• Inspiring electrical engineering students through fully-engaged hands-on learningRobert J. Bowman. 574-577 [doi]
• Electronic system hardware exploration in an inverted classroomJames Barker, Julia Cline, Kuang Sheng, Steven Bibyk. 578-581 [doi]
• Novel centre frequency and bandwidth control of RF LNA using two-tones phase delayRoghoyeh Salmeh, Bogdan Georgescu. 582-585 [doi]
• An active interference cancellation technique with harmonic rejection for a broadband channelizerWei-Gi Ho, Travis Forbes, Vineet Kumar Singh, Ranjit Gharpurey. 586-589 [doi]
• Analysis of the oscillation frequency and waveform amplitude for a high-frequency differential ring oscillatorChaojiang Li, Fei Gong, Pingshan Wang. 590-593 [doi]
• Design and implementation of a 9W, 0.3-3.7 GHz linear power amplifier using GaN HEMTBasem M. Abdrahman, Hesham N. Ahmed, Khaled A. Shehata. 594-597 [doi]
• A 780-MHz low power transceiver for wireless nodes applications in Internet of ThingsFanzhen Meng, Hong Liu, Ke Zhang, Kai Kang, Tong Tian. 598-601 [doi]
• Review of nanoscale memristor devices as synapses in neuromorphic systemsNathan Serafino, Mona E. Zaghloul. 602-603 [doi]
• Nonlinear Lyapunov-based control for HIV-1 dynamicsFatma A. Alazabi, Mohamed A. Zohdy. 604-607 [doi]
• Use of the Extended Kalman Filter for biological models accuracySimon Omekanda, Jean-Lucien Omekanda, Hoda S. Abdel-Aty-Zohdy, Mohamed A. Zohdy. 608-611 [doi]
• Loop gain in feedback circuits: A unified theory using driving point impedanceAgustin Ochoa. 612-615 [doi]
• Daubechies-4 wavelets system-on-chip for classifications of mixed-chemicalHoda S. Abdel-Aty-Zohdy, Stephanie Roth, Ephram Mebrahtu. 616-620 [doi]
• On the settling of nondelaying cascaded switched-capacitor integratorsMostafa A. N. Haroun, Anas A. Hamoui. 621-624 [doi]
• Novel analysis of passive mixer output impedance using switched-capacitor techniquesEssam S. Atalla, Abdellatif Bellaouar, Poras T. Balsara. 625-628 [doi]
• Envelope tracking technique with bang-bang slew-rate enhancer for linear wideband RF PAsRichard Turkson, Suraj Prakash, José Silva-Martínez, Herminio Martinez-Garcia. 629-632 [doi]
• A continuous-time sigma-delta ADC with tunable pass-band for multi-standard applicationsMahmood Barangi, Ahmad Beirami, Hamid Nejati, Warsame H. Ali. 633-636 [doi]
• Comparison of hardware based and software based stress testing of memory IO interfaceBruce Querbach, Sudeep Puligundla, Daniel Becerra, Zale T. Schoenborn, Patrick Chiang. 637-640 [doi]
• A multilayer crosstalk avoidance router using restricted maze gridsYoshiya Fujii, Michiaki Muraoka, Masahiko Toyonaga. 641-644 [doi]
• Path delay testing in resilient systemQiang Han, Jianghao Guo, Wen-Ben Jone, Qiang Xu 0001. 645-648 [doi]
• Crossing-aware channel routing for photonic waveguidesChristopher Condrat, Priyank Kalla, Steve Blair. 649-652 [doi]
• Variable latency VLSI design based on timing analysis, delay ATPG, and completion predictionBao Liu, Lu Wang, Juan Portillo. 653-656 [doi]
• Novel implementation of full adder based scaling in Residue Number SystemsAzadeh Safari, James Nugent, Yinan Kong. 657-660 [doi]
• Efficient calibration scheme for high-resolution pipelined ADCsAndreas Larsson, José Silva-Martínez. 661-664 [doi]
• A background gain- calibration technique for low voltage pipelined ADCs based on nonlinear interpolationLi Ding, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins. 665-668 [doi]
• An efficient calibration technique for pipeline ADCChenchen Zhao, Lili Xu, Fule Li, Zhihua Wang. 669-672 [doi]
• A 9-bit 123-MS/s swiched-current pipelined ADC with OP feedback and offset current cancellationGuo-Ming Sung, Wen-Sheng Lin, Jiung-Shian Li. 673-676 [doi]
• Digital calibration of inter-stage nonlinear errors in pipelined SAR ADCYuan Zhou 0011, Yun Chiu. 677-680 [doi]
• La Casa del Sol, EarthConnection and a solar golf cart three case studies in solar energyPaula González, Michael A. Soderstrand. 681-684 [doi]
• Design and interconnection of utility-scale solar PV plantsErnst H. Camm, James K. Niemira. 685-688 [doi]
• Mini-dish based hybrid Concentrated Solar Power (CSP) system for home useMichael A. Soderstrand, Sung Baek Lee, Peter Chung. 689-692 [doi]
• Path planning of solar-powered unmanned aerial vehicles at low altitudeRan Dai. 693-696 [doi]
• The design of multijunction photovoltaic systems for realistic operating conditionsJeffery L. Gray, John R. Wilcox. 697-700 [doi]
• Micro-fabrication of an absolute flow calorimeter for DC to RF power measurementBilel Neji, Jing Xu, Albert H. Titus, Joel Meltzer. 701-704 [doi]
• A high efficiency 90-nm CMOSRF to DC rectifierMaziar Rastmanesh, Ezz El-Masry. 705-708 [doi]
• An integrated silicon-on-insulator continually tunable optical delay line for optical coherence tomographyMohamed Rahim, Peter Akkary, Nazih Jamaleddine, Frederic Nabki, Michael Menard. 709-712 [doi]
• Design of a 10-Gb/s integrated limiting receiver for silicon photonics interconnectsKehan Zhu, Sakkarapani Balagopal, Vishal Saxena, Wan Kuang. 713-716 [doi]
• A variable-bandwidth, power-scalable optical receiver front-end in 65 nmPartha Protim Dash, Glenn E. R. Cowan, Odile Liboiron-Ladouceur. 717-720 [doi]
• Temperature, gas and pressure ECG sensor by using carbon nanotubePenghua Sun, Maher E. Rizkalla. 721-723 [doi]
• Carbon nanotube-based microstrip antenna gas sensorR. Verma, K. Said, J. Salim, E. Kimathi, Maher E. Rizkalla, S. Shrestha, M. Agarwal, Kody Varahramyan. 724-727 [doi]
• Mismatch insensitive automatic tuning control for the single electron transistor readout circuitKushal Das, Torsten Lehmann. 728-731 [doi]
• Heat transfer simulations for pulsed laser annealing of silicon thin filmMunEm Hossain, Masud H. Chowdhury. 732-735 [doi]
• Analysis of the interface barriers between nano metal particles and semiconductors substratesMoh'd Rezeq, Khouloud Eledlebi, Mohammed Ismail 0001, Isra Lababidi. 736-738 [doi]
• Dual directional coupler design with transformersSathwik Madishetti, Abdullah Eroglu. 739-741 [doi]
• Observation of chaotic behavior in automatic tuning loops for continuous-time filtersHermino Martinez-Garcia, Jordi Cosp-Vilella, Manuel Manzanares-Brotons. 742-745 [doi]
• Tradeoffs between settling time and jitter in phase locked loopsPallavi Paliwal, Priyank Laad, Mohanrao Sattineni, Shalabh Gupta. 746-749 [doi]
• Analysis of linear time-varying circuits by two-dimensional analog filteringShervin Erfani, Majid Ahmadi, Nima Bayan. 750-753 [doi]
• Mixed-mode and chaotic oscillating circuits: Bifurcations and newtonian propertiesWieslaw Marszalek, Zdzislaw W. Trzaska. 754-759 [doi]
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• Hardware-efficient parallel structures for linear-phase FIR digital filterJingjing Tian, Guangjun Li, Qiang Li. 995-998 [doi]
• Design of 2-D digital filters with almost quadrantal symmetric magnitude response without 1-D separable denominator factor constraintI-Hung Khoo, Hari C. Reddy, Lan-Da Van, Chin-Teng Lin. 999-1002 [doi]
• Low-cost parallel FFT processors with conflict-free ROM-based twiddle factor generator for DVB-T2 applicationsPing-Chang Jui, Chin-Long Wey, Muh-Tian Shiue. 1003-1006 [doi]
• FFT-based phase compensation of 2-D beam digital filters for electronically steerable RF arraysSewwandi Wijayaratna, Arjuna Madanayake, Len T. Bruton. 1007-1010 [doi]
• Efficient design of two-stage comb-based decimation filters using Chebyshev sharpeningDavid Ernesto Troncoso Romero, Gordana Jovanovic-Dolecek, Massimiliano Laddomada. 1011-1014 [doi]
• Digital Down Converter optimizationJoe Gerhardt, Saiyu Ren. 1015-1018 [doi]
• Fault tolerant designs for fast convolution implemented with modified transformsC. Radhakrishnan, W. K. Jenkins. 1019-1022 [doi]
• Power and noise configurable phase-locked loop using multi-oscillator feedback alignmentChristopher Williams 0003, Glenn E. R. Cowan, Odile Liboiron-Ladouceur. 1023-1026 [doi]
• A tracked oversampling digital data recovery for Low Latency, fast acquisition, and high jitter toleranceJune-Hee Lee, Sang-Hoon Kim, Jong-Shin Shin, Dong-Chul Choi, Kee-Won Kwon, Jung-Hoon Chun. 1027-1030 [doi]
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• Sub-sampling charge pump and random pulsewidth matching technique for frequency synthesizerTe-Wen Liao, Jun-Ren Su, Chung-Chih Hung. 1035-1038 [doi]
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• Improving reliability in DNA-based computationsAnusha Mantha, George B. Purdy, Carla Purdy. 1047-1050 [doi]
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• Gate abstractions and reversibility: On the logical-physical linkNeal G. Anderson. 1059-1062 [doi]
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• SAT-based reversible gate/wire replacement fault testingSayeeda Sultana, Atena Roshan Fekr, Katarzyna Radecka. 1075-1078 [doi]
• 2-channel Time-Interleaved ADC frequency response mismatch correction using adaptive I/Q signal processingSimran Singh, Michael Epp, Georg Vallant, Mikko Valkama, Lauri Anttila. 1079-1084 [doi]
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• Modeling and dynamic cancellation of TX-RX leakage in FDD transceiversAdnan Qamar Kiayani, Lauri Anttila, Mikko Valkama. 1089-1094 [doi]
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