Abstract is missing.
- Keynote: rethinking memory system designOnur Mutlu. 1 [doi]
- MORPh: mobile OLED power friendly camera systemXiang Chen 0010, Jiachen Mao, Kent W. Nixon, Yiran Chen. 1-5 [doi]
- Embedded virtualization for the design of secure IoT applicationsCarlos Moratelli, Sergio Johann Filho, Marcelo Neves, Fabiano Hessel. 2-6 [doi]
- A HW/SW embedded system for accelerating diagnosis of glaucoma from eye fundus imagesPaulo Cezar Dantas, Andrea Sarmento, Adriano Sarmento. 12-18 [doi]
- EEGu2: an embedded device for brain/body signal acquisition and processingShen Feng, Mian Tang, Fernando Quivira, Tim Dyson, Filip Cuckov, Gunar Schirner. 19-25 [doi]
- Automatic detection and elision of reset sub-circuitsPanagiotis Patros, Kenneth B. Kent. 26-32 [doi]
- Architectural performance analysis of FPGA synthesized LEON processorsCorentin Damman, Gregory Edison, Fabrice Guet, Eric Noulard, Luca Santinelli, Jérôme Hugues. 33-40 [doi]
- On-board non-regression test of HLS tools targeting FPGAArief Wicaksana, Adrien Prost-Boucle, Olivier Muller, Frédéric Rousseau, Arif Sasongko. 41-47 [doi]
- On platforms for CPS - adaptive, predictable and efficientLothar Thiele, Felix Sutton, Romain Jacob, Roman Lim, Reto Da Forno, Jan Beutel. 48-50 [doi]
- Overloads in compositional embedded real-time control systemsAkramul Azim. 51-57 [doi]
- Efficient parallel multi-objective optimization for real-time systems software design explorationRahma Bouaziz 0002, Laurent Lemarchand, Frank Singhoff, Bechir Zalila, Mohamed Jmaiel. 58-64 [doi]
- Design of an expandable real-time simulation (eRTS) platform for multi-level rapid prototypingAnkurkumar Patel, Troy Silloway, Fnu Qinggele, Yong-Kyu Jung. 65-71 [doi]
- Architecture exploration of intelligent robot system using ros-compliant FPGA componentTakeshi Ohkawa, Kazushi Yamashina, Takuya Matsumoto, Kanemitsu Ootsu, Takashi Yokota. 72-78 [doi]
- Rapid SOC prototyping utilizing quilt packaging technology for modular functional IC partitioningTian Lu, Carlos Ortega, Jason Kulick, G. H. Bernstein, Scott Ardisson, Rob Engelhardt. 79-85 [doi]
- RapidSoC: short turnaround creation of FPGA based SoCsJakob Wenzel, Christian Hochberger. 86-92 [doi]
- Simulation driven insertion of data prefetching instructions for early software-on-SoC optimizationPerrin N. Ntafam, Eric Paire, Alain Clouard, Frédéric Pétrot. 93-99 [doi]
- HAMEX: heterogeneous architecture and memory exploration frameworkKasra Moazzemi, Chen-Ying Hsieh, Nikil D. Dutt. 100-106 [doi]
- Inter-FPGA routing environment for performance exploration of multi-FPGA systemsUmer Farooq, Roselyne Chotin-Avot, Muhammad Moazam Azeem, Maminionja Ravoson, Mariem Turki, Habib Mehrez. 107-113 [doi]
- Model-driven design & synthesis of the SHA-256 cryptographic hash function in rewireWilliam L. Harrison, Adam M. Procter, Gerard Allwein. 114-120 [doi]
- Schedulability-guided exploration of multi-core systemsRabeh Ayari, Imane Hafnaoui, Giovanni Beltrame, Gabriela Nicolescu. 121-127 [doi]
- Transforming VHDL descriptions into formal component-based modelsAyoub Nouri, Rahma Ben Atitallah, Anca Molnos, Christian Fabre, Frédéric Heitzmann, Olivier Debicki. 128-135 [doi]