Abstract is missing.
- Energy-efficient and robust middleware prototyping for smart mobile computingSaideep Tiku, Sudeep Pasricha. 2-8 [doi]
- Constructing fast and cycle-accurate simulators for configurable accelerators using C++ templatesMichael Witterauf, Frank Hannig, Jürgen Teich. 9-15 [doi]
- Prototyping dynamic task migration on heterogeneous reconfigurable systemsArief Wicaksana, Alban Bourge, Olivier Muller, Arif Sasongko, Frédéric Rousseau. 16-22 [doi]
- PoIiCym: rapid prototyping of resource management policies for HMPsTiago Mück, Bryan Donyanavard, Nikil D. Dutt. 23-29 [doi]
- GeCo: classification restricted Boltzmann machine hardware for on-chip learningWooseok Yi, Junki Park, Jae-Joon Kim. 30-35 [doi]
- Simulation-based circuit-activity estimation for FPGAs containing hard blocksSean Seeley, Vidya Sankaranaryanan, Zack Deveau, Panagiotis Patros, Kenneth B. Kent. 36-42 [doi]
- Software platform dedicated for in-memory computing circuit evaluationMaha Kooli, Henri-Pierre Charles, Clément Touzet, Bastien Giraud, Jean-Philippe Noël. 43-49 [doi]
- Executable dataflow benchmark generation technique for multi-core embedded systemsJeonggyu Jang, Hoeseok Yang. 50-56 [doi]
- Time synchronization services for low-cost fog computing applicationsPéter Völgyesi, Abhishek Dubey, Timothy Krentz, István Madari, Mary Metelko, Gabor Karsai. 57-63 [doi]
- An analysis of random cache effects on real-time multi-core scheduling algorithmsImane Hafnaoui, Chao Chen, Rabeh Ayari, Gabriela Nicolescu, Giovanni Beltrame. 64-70 [doi]
- One-instruction set computer-based multicore processors for energy-efficient streaming data processingMinato Yokota, Kaoru Saso, Yuko Hara-Azumi. 71-77 [doi]
- The extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototypingDaniel Mueller-Gritschneder, Keerthikumara Devarajegowda, Martin Dittrich, Wolfgang Ecker, Marc Greim, Ulf Schlichtmann. 79-84 [doi]
- Rapid prototyping of IoT applications with Esperanto compilerGyeongmin Lee, Seonyeong Heo, Bongjun Kim, Jong Kim 0001, Hanjun Kim. 85-91 [doi]
- Binary synthesis implementing external interrupt handler as independent moduleNaoya Ito, Yuuki Oosako, Nagisa Ishiura, Hiroyuki Kanbara, Hiroyuki Tomiyama. 92-98 [doi]
- Speculative execution in distributed controllers for high-level synthesisMiho Shimizu, Nagisa Ishiura, Sayuri Ota, Wakako Nakano. 99-104 [doi]