Table of Contents

• Instrumentation-driven framework for validation of dataflow applicationsIlya Chukhman, Shuvra S. Bhattacharyya. 1-6 [doi]
• Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer schedulingMassimo Canale, Simone Casale Brunet, Endri Bezati, Marco Mattavelli, Jörn W. Janneck. 7-12 [doi]
• High-performance sparse fast Fourier transformsJörn Schumacher, Markus Püschel. 13-18 [doi]
• Effect of computation offload on performance and energy consumption of mobile face recognitionNanoka Sumi, Akiya Baba, Vasily G. Moshnyaga. 19-25 [doi]
• IPPro: FPGA based image processing processorFahad Manzoor Siddiqui, Matthew Russell, Burak Bardak, Roger Woods, Karen Rafferty. 26-31 [doi]
• Energy-adaptive performance management for self-sustained signal processing systemsJunLin Chen, Lei Wang. 32-37 [doi]
• Power-aware HEVC decoding with tunable image qualityErwan Nogues, Simon Holmbacka, Maxime Pelcat, Daniel Menard, Johan Lilius. 38-43 [doi]
• A search-less DEC BCH decoder for low-complexity fault-tolerant systemsInjae Yoo, In-Cheol Park. 44-49 [doi]
• Computation-skip error resilient scheme for recursive CORDICYanxiang Huang, Meng Li, Chunshu Li, Peter Debacker, Liesbet Van der Perre. 50-55 [doi]
• A reduced latency list decoding algorithm for polar codesJun Lin, Chenrong Xiong, Zhiyuan Yan. 56-61 [doi]
• Accelerating integer-based fully homomorphic encryption using Comba multiplicationCiara Moore, Máire O'Neill, Neil Hanley, Elizabeth O'Sullivan. 62-67 [doi]
• Channel-adaptive complex K-best MIMO detection using lattice reductionFarhana Sheikh, Elias Szabo-Wexler, Mehnaz Rahman, Wei Wang, Borislav Alexandrov, Dongmin Yoon, Anthony Chun, Hossein Alavi. 68-73 [doi]
• Interference suppression with physical-layer network coding and MIMO for multi-way channelsFlávio S. Brás, Filipe E. Ferreira, Francisco A. Monteiro, Antonio Rodrigues. 74-79 [doi]
• Weighted least squares solution for RSS based localization in correlated shadowingZeyuan Li, Pei Jung Chung. 80-84 [doi]
• A low complexity scheme for accurate 3D velocity estimation in ultrasound systemsSiyuan Wei, Ming Yang, Chaitali Chakrabarti, Richard Sampson, Thomas F. Wenisch, Oliver Kripfgans, J. Brian Fowlkes. 85-90 [doi]
• Composite data fusion algorithm for miniature vehicles building navigation base in formation flyingRunle Du, Jiaqi Liu, Zhifeng Li, Zhenhong Niu, Zhiye Jiang, Yadong Yang. 91-96 [doi]
• What is the world's fastest connected component labeling algorithm?Laurent Cabaret, Lionel Lacassagne. 97-102 [doi]
• On modified EMD: Selective extrema analysisAsma Qureshi, Maïté Brandt-Pearce. 103-108 [doi]
• Programmable in-loop deblock filter processor for video decodersJanne Janhunen, Pekka Jääskeläinen, Jari Hannuksela, Tero Rintaluoma, Aki Kuusela. 109-114 [doi]
• Customizing a VLIW-SIMD application-specific instruction-set processor for hearing aid devicesJulian Hartig, Lukas Gerlach, Guillermo Payá Vayá, Holger Blume. 115-120 [doi]
• FPGA-based Tabu search for detection in large-scale MIMO systemsYun Wu, John McAllister. 121-126 [doi]
• Compiler optimizations for code density of variable length instructionsHeikki Kultala, Timo Viitanen, Pekka Jääskeläinen, Janne Helkala, Jarmo Takala. 127-132 [doi]
• Algorithm and architecture for a multiple-field context-driven search engine using fully-parallel clustered associative memoriesHooman Jarollahi, Naoya Onizawa, Vincent Gripon, Takahiro Hanyu, Warren J. Gross. 133-138 [doi]
• Low cost ECC schemes for improving the reliability of DRAM+PRAMMAIN memory systemsManqing Mao, Chengen Yang, Zihan Xu, Yu Cao, Chaitali Chakrabarti. 139-144 [doi]
• Optimal voltage signal sensing of NAND flash memory for LDPC codeShigui Qi, Dan Feng, Jingning Liu. 145-150 [doi]
• Direct and indirect measurement of inter-cell capacitance in NAND flash memoryDong-hwan Lee, Wonyong Sung. 151-156 [doi]
• Real-time compensation of static distortion by measurement of differential noise gainLachlan J. Gunn, Andrew Allison, Derek Abbott. 157-161 [doi]
• Trend-extracted MSE based on adaptive aligned EEMD with early termination scheme: Analysis of the acute stroke patients' physiological signalsPei-Wen Huang, Wei-Jung Jou, Yu-Min Lin, Hsiao-I. Jen, Sung-Chun Tang, Dar-Ming Lai, An-Yeu Andy Wu. 162-167 [doi]
• A low complexity estimation architecture based on noisy comparatorsRyan M. Corey, Andrew C. Singer, Sen Tao, Naveen Verma. 168-173 [doi]
• Fixed-point feedforward deep neural network design using weights +1, 0, and -1Kyuyeon Hwang, Wonyong Sung. 174-179 [doi]
• Software polar decoder on an embedded processorBertrand Le Gal, Camille Leroux, Christophe Jégo. 180-185 [doi]
• Design and implementation of a convex-optimized positioning system on wireless RF/FPGA platformLi-Hong Huang, Kai-Ting Shr, Ming-Hung Lin, Yuan-Hao Huang. 186-191 [doi]
• 3.2Gbps channel-adaptive configurable MIMO detector for multi-mode wireless communicationFarhana Sheikh, Chia-Hsiang Chen, Dongmin Yoon, Borislav Alexandrov, Keith A. Bowman, Anthony Chun, Hossein Alavi, Zhengya Zhang. 192-197 [doi]
• Symbol-based successive cancellation list decoder for polar codesChenrong Xiong, Jun Lin, Zhiyuan Yan. 198-203 [doi]
• Implementation of a novel architecture for DFT-based channel estimators in OFDM systemsMichal Stala, Ove Edfors, Viktor Öwall. 204-209 [doi]
• FPGA implementation of a clockless stochastic LDPC decoderChris Ceroici, Vincent C. Gaudet. 210-214 [doi]
• Increasing the speed of polar list decodersGabi Sarkis, Pascal Giard, Alexander Vardy, Claude Thibeault, Warren J. Gross. 215-220 [doi]
• Efficient reconfigurable architecture for MIMD streaming execution using permutation networkChi Wen Cheng, Yu-sheng Lin, Shao-Yi Chien. 221-225 [doi]
• Empirical evaluation of multi-device profiling side-channel attacksNeil Hanley, Máire O'Neill, Michael Tunstall, William P. Marnane. 226-231 [doi]
• IEEE 802.11ac MIMO receiver baseband processing on customized VLIW processorMona Aghababaeetafreshi, Lasse Lehtonen, Toni Levanen, Mikko Valkama, Jarmo Takala. 232-237 [doi]
• Histogram of oriented gradients front end processing: An FPGA based processor approachColm Kelly, Fahad Manzoor Siddiqui, Burak Bardak, Roger Woods. 238-243 [doi]
• Mapping visual signal processing onto multi-core platform via algorithm/architecture co-explorationChun-Fu Chen, Gwo Giun (Chris) Lee, Zheng-Han Yu, Chun-Hsi Huang. 244-249 [doi]
• Acceleration of clustering-based superpixel algorithms with low memory costsTse-Wei Chen, Noriyasu Hashiguchi, Masahiro Ariizumi, Kinya Osa, Daisuke Nakashima, Yasuo Fukuda, Shiori Wakino, Shinji Shiraga, Masami Kato. 250-255 [doi]
• Energy-efficient HOG-based object detection at 1080HD 60 fps with multi-scale supportAmr Suleiman, Vivienne Sze. 256-261 [doi]
• Coarse-grained reconfigurable stream processor for distributed smart camerasWei-Kai Chan, Yu-Hsiang Tseng, Yu-sheng Lin, Shao-Yi Chien. 262-267 [doi]
• Neuromorphic acceleration for context aware text image recognitionQinru Qiu, Zhe Li, Khadeer Ahmed, Hai Helen Li, Miao Hu. 268-273 [doi]
• Energy-efficient vision on the PULP platform for ultra-low power parallel computingFrancesco Conti 0001, Davide Rossi, Antonio Pullini, Igor Loi, Luca Benini. 274-279 [doi]
• Understanding the landscape of accelerators for visionNandhini Chandramoorthy, Karthik Swaminathan, Matthew Cotter, Xueqing Li, Indranil Palit, Xiaobo Sharon Hu, Michael T. Niemier, Kevin M. Irick. 280-285 [doi]
• HMAX image processing pipeline with coupled oscillator accelerationBrandon B. Jennings, Reggie Barnett, Chet N. Gnegy, John A. Carpenter, Yan Fang, Donald M. Chiarulli, Steven P. Levitan. 286-291 [doi]
• Earliest-deadline first scheduling of multiple independent dataflow graphsAdnan Bouakaz, Thierry Gautier, Jean-Pierre Talpin. 292-297 [doi]
• Modeling dynamic partial reconfiguration in the dataflow paradigmJonathan Piat, Jérémie Crenne. 298-303 [doi]
• Power-awarness in coarse-grained reconfigurable designs: A dataflow based strategyFrancesca Palumbo, Carlo Sau, Luigi Raffo. 304-309 [doi]
• Efficient fixed-point refinement of DSP dataflow systemsErwan Nogues, Daniel Menard. 310-315 [doi]