Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator Board

Pawel Chodowiec, Kris Gaj, Peter Bellows, Brian Schott. Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator Board. In George I. Davida, Yair Frankel, editors, Information Security, 4th International Conference, ISC 2001, Malaga, Spain, October 1-3, 2001, Proceedings. Volume 2200 of Lecture Notes in Computer Science, pages 220-234, Springer, 2001. [doi]

Abstract

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