Simultaneous gate sizing and Vth assignment using Lagrangian Relaxation and delay sensitivities

Guilherme Flach, Tiago Reimann, Gracieli Posser, Marcelo O. Johann, Ricardo Reis. Simultaneous gate sizing and Vth assignment using Lagrangian Relaxation and delay sensitivities. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013, Natal, Brazil, August 5-7, 2013. pages 84-89, IEEE, 2013. [doi]

Abstract

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