A 0.18-µm CMOS clock and data recovery circuit with reference-less dual loops - researchr publication

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Miao Li, Tad Kwasniewski, Shoujun Wang. A 0.18-µm CMOS clock and data recovery circuit with reference-less dual loops. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 2358-2361, IEEE, 2008. [doi]

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