Michael Shoniker, Bruce F. Cockburn, Jie Han, Witold Pedrycz. Minimizing the number of process corner simulations during design verification. In Wolfgang Nebel, David Atienza, editors, Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015. pages 289-292, ACM, 2015. [doi]
Abstract is missing.