Optimizing cell area by applying an alternative transistor folding technique in an open source physical synthesis CAD tool

Gustavo H. Smaniotto, Joao J. S. Machado, Matheus T. Moreira, Adriel Mota Ziesemer, Felipe S. Marques, Leomar S. da Rosa Jr.. Optimizing cell area by applying an alternative transistor folding technique in an open source physical synthesis CAD tool. In IEEE 7th Latin American Symposium on Circuits & Systems, LASCAS 2016, Florianopolis, Brazil, February 28 - March 2, 2016. pages 355-358, IEEE, 2016. [doi]

Abstract

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