Reliable logic mapping on Nano-PLA architectures

Masoud Zamani, Mehdi Baradaran Tahoori. Reliable logic mapping on Nano-PLA architectures. In Erik Brunvard, Ken Stevens, Joseph R. Cavallaro, Tong Zhang 0002, editors, Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012. pages 107-110, ACM, 2012. [doi]

Abstract

Abstract is missing.