Abstract is missing.
- A Compiler Framework for Supporting Speculative Multicore ProcessorsPen-Chung Yew. 1 [doi]
- Power-Efficient Heterogeneous Multicore Technology for Digital ConvergenceKunio Uchiyama. 2-3 [doi]
- StarDBT: An Efficient Multi-platform Dynamic Binary Translation SystemCheng Wang, Shiliang Hu, Ho-Seop Kim, Sreekumar R. Nair, Mauricio Breternitz Jr., Zhiwei Ying, Youfeng Wu. 4-15 [doi]
- Unbiased Branches: An Open ProblemArpad Gellert, Adrian Florea, Maria Vintan, Colin Egan, Lucian N. Vintan. 16-27 [doi]
- An Online Profile Guided Optimization Approach for Speculative Parallel ThreadingYuan Liu, Hong An, Bo Liang, Li Wang. 28-39 [doi]
- Entropy-Based Profile Characterization and Classification for Automatic Profile ManagementJinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew, Sreekumar R. Nair, Robert Y. Geva. 40-51 [doi]
- Laplace Transformation on the FT64 Stream ProcessorYu Deng, Xuejun Yang, Xiaobo Yan, Kun Zeng. 52-62 [doi]
- Towards Data Tiling for Whole Programs in Scratchpad Memory AllocationLian Li 0002, Hui Wu, Hui Feng, Jingling Xue. 63-74 [doi]
- Evolution of NAND Flash Memory InterfaceSang Lyul Min, Eyee Hyun Nam, Young Hee Lee. 75-79 [doi]
- FCC-SDP: A Fast Close-Coupled Shared Data Pool for Multi-core DSPsDong Wang, Xiaowen Chen, Shuming Chen, Xing Fang, Shuwei Sun. 80-89 [doi]
- Exploiting Single-Usage for Effective Memory ManagementThomas Piquet, Olivier Rochecouste, André Seznec. 90-101 [doi]
- An Alternative Organization of Defect Map for Defect-Resilient Embedded On-Chip MemoriesKang Yi, Shih-Yang Cheng, Young-Hwan Park, Fadi J. Kurdahi, Ahmed M. Eltawil. 102-113 [doi]
- An Effective Design of Master-Slave Operating System Architecture for Multiprocessor Embedded SystemsMinyeol Seo, Ha Seok Kim, Ji Chan Maeng, Jimin Kim, Minsoo Ryu. 114-125 [doi]
- Optimal Placement of Frequently Accessed IPs in Mesh NoCsReza Moraveji, Hamid Sarbazi-Azad, Maghsoud Abbaspour. 126-138 [doi]
- An Efficient Link Controller for Test Access to IP Core-Based Embedded System ChipsJaehoon Song, Hyunbean Yi, Juhee Han, Sungju Park. 139-150 [doi]
- Performance of Keyword Connection Algorithm in Nested Mobility NetworksSang-Hoon Ryu, Doo-Kwon Baik. 151-162 [doi]
- Leakage Energy Reduction in Cache Memory by Software Self-invalidationKiyofumi Tanaka, Takenori Fujita. 163-174 [doi]
- Exploiting Task Temperature Profiling in Temperature-Aware Task Scheduling for Computational ClustersDaniel C. Vanderster, Amirali Baniasadi, Nikitas J. Dimopoulos. 175-185 [doi]
- Runtime Performance Projection Model for Dynamic Power ManagementSang-Jeong Lee, Hae-Kag Lee, Pen-Chung Yew. 186-197 [doi]
- A Power-Aware Alternative for the Perceptron Branch PredictorKaveh Aasaraai, Amirali Baniasadi. 198-208 [doi]
- Power Consumption and Performance Analysis of 3D NoCsAkbar Sharifi, Hamid Sarbazi-Azad. 209-219 [doi]
- A Design Methodology for Performance-Resource Optimization of a Generalized 2D Convolution Architecture with Quadrant Symmetric KernelsMing Z. Zhang, Vijayan K. Asari. 220-234 [doi]
- Bipartition Architecture for Low Power JPEG Huffman DecoderShanq-Jang Ruan, Wei-te Lin. 235-243 [doi]
- A SWP Specification for Sequential Image Processing AlgorithmsWensheng Tang, Shaogang Wang, Dan Wu, Wangqiu Kuang. 244-255 [doi]
- A Stream System-on-Chip Architecture for High Speed Target Recognition Based on Biologic VisionNan Wu, Qianming Yang, Mei Wen, Yi He, Changqing Xun, Chunyuan Zhang. 256-267 [doi]
- FPGA-Accelerated Active Shape Model for Real-Time People TrackingYong Dou, Jinbo Xu. 268-279 [doi]
- Performance Evaluation of Evolutionary Multi-core and Aggressively Multi-threaded Processor ArchitecturesPartha Tirumalai, Yonghong Song, Spiros Kalogeropulos. 280-289 [doi]
- Synchronization Mechanisms on Modern Multi-core ArchitecturesShaoshan Liu, Jean-Luc Gaudiot. 290-303 [doi]
- Concerning with On-Chip Network Features to Improve Cache Coherence Protocols for CMPsHongbo Zeng, Kun Huang, Ming Wu, Weiwu Hu. 304-314 [doi]
- Generalized Wormhole Switching: A New Fault-Tolerant Mathematical Model for Adaptively Wormhole-Routed Interconnect NetworksFarshad Safaei, Ahmad Khonsari, Mahmood Fathy, N. Talebanfard, Mohamed Ould-Khaoua. 315-326 [doi]
- Open Issues in MPI ImplementationRajeev Thakur, William Gropp. 327-338 [doi]
- Implicit Transactional Memory in Kilo-Instruction MultiprocessorsMarco Galluzzi, Enrique Vallejo, Adrián Cristal, Fernando Vallejo, Ramón Beivide, Per Stenström, James E. Smith, Mateo Valero. 339-353 [doi]
- Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function UnitsYong Li, Zhiying Wang, Xue-mi Zhao, Jian Ruan, Kui Dai. 354-363 [doi]
- A Bypass Mechanism to Enhance Branch Predictor for SMT ProcessorsYongfeng Pan, Xiaoya Fan, Liqiang He, Deli Wang. 364-375 [doi]
- Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT ProcessorEmre Özer, Stuart Biles. 376-386 [doi]
- Architectural Solution to Object-Oriented ProgrammingYiyu Tan, Anthony S. Fong, Yang Xiaojian. 387-398 [doi]