Abstract is missing.
- The Reality of System Design Today: Do Theory and Practice Meet?Grant Martin. 3 [doi]
- Cyclic Communicating Processes: Hierarchy and VerificationP. S. Thiagarajan. 4 [doi]
- Model Driven Embedded SystemsIan Oliver. 5 [doi]
- Polychrony for Formal Refinement-Checking in a System-Level Design MethodologyJean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh K. Gupta, Frederic Doucet. 9-19 [doi]
- Case Studies of Model Checking for Embedded System DesignsXi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe. 20-28 [doi]
- Quasi-Static Scheduling for Concurrent ArchitecturesJordi Cortadella, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe. 29-40 [doi]
- Synthesis of Open Reactive Systems from Scenario-Based SpecificationsYves Bontemps, Pierre Yves Schobbens. 41-50 [doi]
- Detecting State Coding Conflicts in STG Unfoldings Using SATVictor Khomenko, Maciej Koutny, Alexandre Yakovlev. 51-60 [doi]
- A Polynomial-Time Algorithm for Checking Consistency of Free-Choice Signal Transition GraphsJavier Esparza. 61-70 [doi]
- Separation of Concerns in the Formal Design of Real-Time Shared Data-Space SystemsMohammad Reza Mousavi, Michel A. Reniers, Twan Basten, Michel R. V. Chaudron. 71-81 [doi]
- Modelling a Secure, Mobile, and Transactional System with CO-OPNDidier Buchs, Stanislav Chachkov, David Hurzeler. 82-91 [doi]
- Developing a Formal Specification for the Mission System of a Maritime Surveillance AircraftLaure Petrucci, Jonathan Billington, Lars Michael Kristensen, Zahid H. Qureshi. 92-101 [doi]
- Design Validation of ZCSP with SPINVincent Beaudenon, Emmanuelle Encrenaz, Jean Lou Desbarbieux. 102-110 [doi]
- Memory Fault Tolerance Software Mechanisms: Design and Configuration Support through SWN ModelsPaolo Ballarini, Lorenzo Capra, Giuliana Franceschinis, Massimiliano De Pierro. 111-121 [doi]
- Component-Based Design: Towards Guided CompositionSotiris Moschoyiannis, Michael W. Shields. 122-131 [doi]
- Compositional High Level Petri Nets with Timing Constraints - A ComparisonElisabeth Pelz, Hans Fleischhack. 132-141 [doi]
- Compositional Verification of Integrity for Digital Stream Signature ProtocolsRoberto Gorrieri, Fabio Martinelli, Marinella Petrocchi, Anna Vaccarelli. 142-149 [doi]
- Merging State-Based and Action-Based VerificationHenri Hansen, Heikki Virtanen, Antti Valmari. 150-156 [doi]
- Communicating Transaction ProcessesAbhik Roychoudhury, P. S. Thiagarajan. 157-166 [doi]
- Logic of Involved Variables - System Specification with Temporal Logic of Distributed ActionsAdrianna Alexander, Wolfgang Reisig. 167-176 [doi]
- Modifying Petri Net Models by Means of Crosscutting OperationsJoão Paulo Barros, Luís Gomes. 177-186 [doi]
- Specification Coverage Aided Test SelectionTuomo Pyhälä, Keijo Heljanko. 187-195 [doi]
- Verification of JavaSpaces:::TM::: Parallel ProgramsJaco van de Pol, Miguel Valero Espada. 196-205 [doi]
- On Lifting of Statechart Structuring MechanismsLuís Gomes, Anikó Costa. 206-215 [doi]
- A New Synchronization in Finite Stochastic Petri Box CalculusHermenegilda Macià, Valentín Valero Ruiz, Fernando Cuartero, Fernando L. Pelayo. 216 [doi]
- C-Sim version 5.0Roman Jokl, Stanislav Racek. 229-230 [doi]
- ABTOOLS: Another B ToolJean-Louis Boulanger. 231-232 [doi]
- Rialto Profile in the SMW ToolkitDag Björklund, Johan Lilius, Ivan Porres. 233-234 [doi]
- HiWorD: A Petri Net-Based Hierarchical Workflow DesignerBoualem Benatallah, Piotr Chrzastowski-Wachtel, Rachid Hamadi, Milton O Dell, Adi Susanto. 235-236 [doi]
- CAST - A Task-Level Concurrency Analysis ToolSander Stuijk, Twan Basten, Jan Ypma. 237-238 [doi]
- A Framework for the Development of ProtocolsFederico Crazzolara, Giuseppe Milicia. 239-240 [doi]
- BHDL: Circuit Design in BAmmar Aljer, Philippe Devienne, Sophie Tison, Jean-Louis Boulanger, Georges Mariano. 241-242 [doi]
- CONFRES: Interactive Coding Conflict Resolver Based on Core VisualisationAgnes Madalinski. 243-244 [doi]
- Abstract Model Checking and Refinement of Temporal Logic in aSPINMaría-del-Mar Gallardo, Jesús Martínez, Pedro Merino, Ernesto Pimentel. 245-246 [doi]
- VoDkaV Tool: Model Checking for Extracting Global Scheduler Properties from Local RestrictionsJuan José Sánchez Penas, Thomas Arts. 247-248 [doi]
- AutoFOCUS and the MoDe ToolJan Romberg, Jan Jürjens, Guido Wimmel, Oscar Slotosch, Gabor Hahn. 249-250 [doi]