Abstract is missing.
- An Unstructured Termination Detection Algorithm Using Gossip in Cloud Computing EnvironmentsJongBeom Lim, Kwang-Sik Chung, Joon-Min Gil, Taeweon Suh, Heon-Chang Yu. 1-12 [doi]
- Power Monitoring for Mixed-Criticality on a Many-Core PlatformBoris Motruk, Jonas Diemer, Rainer Buchty, Mladen Berekovic. 13-24 [doi]
- On Confident Task-Accurate Performance EstimationYang Xu, Bo Wang 0010, Rafael Rosales, Ralph Hasholzner, Jürgen Teich. 25-37 [doi]
- Iwazaru: The Byzantine SequencerMaciej Zbierski. 38-49 [doi]
- Exploiting Thermal Coupling Information in MPSoC Dynamic Thermal ManagementSimone Corbetta, William Fornaciari. 50-61 [doi]
- A Multi-core Memory Organization for 3-D DRAM as Main MemoryJared Sherman, Krishna M. Kavi, Brandon Potter, Mike Ignatowski. 62-73 [doi]
- Synthetic Aperture Radar Data Processing on an FPGA Multi-core SystemPascal Schleuniger, Anders Kusk, Jørgen Dall, Sven Karlsson. 74-85 [doi]
- Virtual Register RenamingMageda Sharafeddine, Haitham Akkary, Doug Carmean. 86-97 [doi]
- Load-Adaptive Monitor-Driven Hardware for Preventing Embedded Real-Time Systems from Overloads Caused by Excessive Interrupt RatesJosef Strnadel. 98-109 [doi]
- Producer-Consumer: The Programming Model for Future Many-Core ProcessorsArnau Prat-Pérez, David Dominguez-Sal, Josep-Lluis Larriba-Pey, Pedro Trancoso. 110-121 [doi]
- A Highly Dependable Self-adaptive Mixed-Signal Multi-core System-on-ChipBenjamin Betting, Julius von Rosen, Lars Hedrich, Uwe Brinkschulte. 122-133 [doi]
- Inter-warp Instruction Temporal Locality in Deep-Multithreaded GPUsAhmad Lashgar, Amirali Baniasadi, Ahmad Khonsari. 134-146 [doi]
- GALS-CMP: Chip-Multiprocessor for GALS Embedded SystemsMuhammad Nadeem, HeeJong Park, Zhenmin Li, Morteza Biglari-Abhari, Zoran Salcic. 147-158 [doi]
- HW/SW Tradeoffs for Dynamic Message Scheduling in Controller Area Network (CAN)Tobias Ziermann, Zoran Salcic, Jürgen Teich. 159-170 [doi]
- A Data-Driven Approach for Executing the CG Method on Reconfigurable High-Performance SystemsFabian Nowak, Ingo Besenfelder, Wolfgang Karl, Mareike Schmidtobreick, Vincent Heuveline. 171-182 [doi]
- Custom Reconfigurable Architecture Based on Virtex 5 Lookup TablesRico Backasch, Christian Hochberger. 183-194 [doi]
- Profiling Energy Consumption of I/O Functions in Embedded ApplicationsShiao Li Tsao, Cheng-Kun Yu, Yi-Hsin Chang. 195-206 [doi]
- An Application-Aware Cache Replacement Policy for Last-Level CachesTripti Warrier, B. Anupama, Madhu Mutyam. 207-219 [doi]
- Deploying Hardware Locks to Improve Performance and Energy Efficiency of Hardware Transactional MemoryEpifanio Gaona-Ramírez, José L. Abellán, Manuel E. Acacio, Juan Fernández. 220-231 [doi]
- Self-adaptation for Mobile Robot Algorithms Using Organic Computing PrinciplesJan Hartmann, Walter Stechele, Erik Maehle. 232-243 [doi]
- Self-virtualized CAN Controller for Multi-core Processors in Real-Time ApplicationsChristian Herber, Andre Richter, Holm Rauchfuss, Andreas Herkersdorf. 244-255 [doi]
- Shrinking L1 Instruction Caches to Improve Energy-Delay in SMT Embedded ProcessorsAlexandra Ferrerón-Labari, Marta Ortín-Obón, Darío Suárez Gracia, Jesús Alastruey-Benedé, Víctor Viñals Yúfera. 256-267 [doi]
- Arithmetic Unit for Computations in GF(p) with the Left-Shifting Multiplicative Inverse AlgorithmJosef Hlavác, Róbert Lórencz. 268-279 [doi]
- HW-OSQM: Reducing the Impact of Event Signaling by Hardware-Based Operating System Queue ManipulationStefan Wallentowitz, Thomas Wild, Andreas Herkersdorf. 280-291 [doi]
- Comparison of GPU and FPGA Implementation of SVM Algorithm for Fast Image SegmentationMarcin Pietron, Maciej Wielgosz, Dominik Zurek, Ernest Jamro, Kazimierz Wiatr. 292-302 [doi]
- Automatic Floorplanning and Interface Synthesis of Island Style Reconfigurable Systems with GoAheadChristian Beckhoff, Dirk Koch, Jim Torresen. 303-316 [doi]
- Separable 2D Convolution with Polymorphic Register FilesCatalin Bogdan Ciobanu, Georgi Nedeltchev Gaydadjiev. 317-328 [doi]
- Architecture of a Parallel MOSFET Parameter Extraction SystemTomás Zahradnický, Róbert Lórencz. 329-340 [doi]
- Predictable Two-Level Bus Arbitration for Heterogeneous Task SetsRoman Bourgade, Christine Rochange, Pascal Sainrat. 341-351 [doi]