Abstract is missing.
- Developing Topology Discovery in Event-BThai Son Hoang, Hironobu Kuruma, David A. Basin, Jean-Raymond Abrial. 1-19 [doi]
- Decomposition Structures for Event-BMichael Butler. 20-38 [doi]
- Taming the Unbounded for Hardware Synthesis39 [doi]
- Verifying UML/OCL Operation ContractsJordi Cabot, Robert Clarisó, Daniel Riera. 40-55 [doi]
- Property Specifications for Workflow ModellingPeter Y. H. Wong, Jeremy Gibbons. 56-71 [doi]
- Formal Verification Based on Guided Random WalksThang H. Bui, Albert Nymeyer. 72-87 [doi]
- Parallel Processes with Real-Time and Data: The ATLANTIF Intermediate FormatJan Stöcker, Frédéric Lang, Hubert Garavel. 88-102 [doi]
- Changing System Interfaces Consistently: A New Refinement Strategy for CSP||BSteve Schneider, Helen Treharne. 103-117 [doi]
- CSP with Hierarchical StateRobert Colvin, Ian J. Hayes. 118-135 [doi]
- Predicate Abstraction in a Program Logic CalculusBenjamin Weiß. 136-150 [doi]
- Mechanised Translation of Control Law Diagrams into CircusFrank Zeyda, Ana Cavalcanti. 151-166 [doi]
- Realizability of Choreographies Using Process Algebra EncodingsGwen Salaün, Tevfik Bultan. 167-182 [doi]
- Modelling Divergence in Relational Concurrent RefinementEerke Boiten, John Derrick. 183-199 [doi]
- SAL-Based Symbolic Scheduling in Time-Triggered NetworksSebastian Voss, Maria Sorea, Klaus Echtle. 200-214 [doi]
- Incremental Reasoning for Multiple InheritanceJohan Dovland, Einar Broch Johnsen, Olaf Owe, Martin Steffen. 215-230 [doi]
- Model Checking LTL Formulae in RAISE with FDRAbigail Parisaca Vargas, Ana Gabriela Garis, S. Lizeth Tapia Tarifa, Chris George. 231-245 [doi]
- An Introduction to Grammar ConvergenceRalf Lämmel, Vadim Zaytsev. 246-260 [doi]
- Application of Graph Transformation in Verification of Dynamic SystemsZarrin Langari, Richard J. Trefler. 261-276 [doi]
- Formal Probabilistic Analysis of Stuck-at Faults in Reconfigurable Memory ArraysOsman Hasan, Naeem Abbasi, Sofiène Tahar. 277-291 [doi]
- Challenges in the Specification of Full ContractsGordon J. Pace, Gerardo Schneider. 292-306 [doi]
- Partial Order Reduction for State/Event LTLNikola Benes, Lubos Brim, Ivana Cerná, Jiri Sochor, Pavlína Vareková, Barbora Zimmerova. 307-321 [doi]
- Dynamic Path Reduction for Software Model CheckingZijiang Yang, Bashar Al-Rawi, Karem Sakallah, Xiaowan Huang, Scott A. Smolka, Radu Grosu. 322-336 [doi]
- Automatic Generation of Error Messages for the Symbolic Execution of EB3 Process ExpressionsJérémy Milhau, Benoît Fraikin, Marc Frappier. 337-351 [doi]
- Decompositional Petri Net ReductionsAstrid Rakow. 352-366 [doi]