Efficient Sparse Matrix-Vector Multiplication on Intel PIUMA Architecture

Sriram Aananthakrishnan, Robert Pawlowski, Joshua B. Fryman, Ibrahim Hur. Efficient Sparse Matrix-Vector Multiplication on Intel PIUMA Architecture. In 2020 IEEE High Performance Extreme Computing Conference, HPEC 2020, Waltham, MA, USA, September 22-24, 2020. pages 1-2, IEEE, 2020. [doi]

@inproceedings{Aananthakrishnan20,
  title = {Efficient Sparse Matrix-Vector Multiplication on Intel PIUMA Architecture},
  author = {Sriram Aananthakrishnan and Robert Pawlowski and Joshua B. Fryman and Ibrahim Hur},
  year = {2020},
  doi = {10.1109/HPEC43674.2020.9286245},
  url = {https://doi.org/10.1109/HPEC43674.2020.9286245},
  researchr = {https://researchr.org/publication/Aananthakrishnan20},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {2020 IEEE High Performance Extreme Computing Conference, HPEC 2020, Waltham, MA, USA, September 22-24, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-9219-2},
}