FPGA implementation of resistor network for fast segment line detector

Ali Abdallah, Daniele Felici, Giulio Aielli, Roberto Cardarelli. FPGA implementation of resistor network for fast segment line detector. In 29th International Conference on Microelectronics, ICM 2017, Beirut, Lebanon, December 10-13, 2017. pages 1-4, IEEE, 2017. [doi]

@inproceedings{AbdallahFAC17,
  title = {FPGA implementation of resistor network for fast segment line detector},
  author = {Ali Abdallah and Daniele Felici and Giulio Aielli and Roberto Cardarelli},
  year = {2017},
  doi = {10.1109/ICM.2017.8268837},
  url = {https://doi.org/10.1109/ICM.2017.8268837},
  researchr = {https://researchr.org/publication/AbdallahFAC17},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {29th International Conference on Microelectronics, ICM 2017, Beirut, Lebanon, December 10-13, 2017},
  publisher = {IEEE},
  isbn = {978-1-5386-4049-4},
}