Secure Boot Design for a RISC-V Based SoC and Implementation on an FPGA

Yasin Adigüzel, Siddika Berna Örs Yalçin. Secure Boot Design for a RISC-V Based SoC and Implementation on an FPGA. In 32nd Signal Processing and Communications Applications Conference, SIU 2024, Mersin, Turkiye, May 15-18, 2024. pages 1-4, IEEE, 2024. [doi]

@inproceedings{AdiguzelY24,
  title = {Secure Boot Design for a RISC-V Based SoC and Implementation on an FPGA},
  author = {Yasin Adigüzel and Siddika Berna Örs Yalçin},
  year = {2024},
  doi = {10.1109/SIU61531.2024.10600837},
  url = {https://doi.org/10.1109/SIU61531.2024.10600837},
  researchr = {https://researchr.org/publication/AdiguzelY24},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {32nd Signal Processing and Communications Applications Conference, SIU 2024, Mersin, Turkiye, May 15-18, 2024},
  publisher = {IEEE},
  isbn = {979-8-3503-8896-1},
}