Resistive memory device requirements for a neural algorithm accelerator

Sapan Agarwal, Steven J. Plimpton, David R. Hughart, Alexander H. Hsia, Isaac Richter, Jonathan A. Cox, Conrad D. James, Matthew J. Marinella. Resistive memory device requirements for a neural algorithm accelerator. In 2016 International Joint Conference on Neural Networks, IJCNN 2016, Vancouver, BC, Canada, July 24-29, 2016. pages 929-938, IEEE, 2016. [doi]

@inproceedings{AgarwalPHHRCJM16,
  title = {Resistive memory device requirements for a neural algorithm accelerator},
  author = {Sapan Agarwal and Steven J. Plimpton and David R. Hughart and Alexander H. Hsia and Isaac Richter and Jonathan A. Cox and Conrad D. James and Matthew J. Marinella},
  year = {2016},
  doi = {10.1109/IJCNN.2016.7727298},
  url = {http://dx.doi.org/10.1109/IJCNN.2016.7727298},
  researchr = {https://researchr.org/publication/AgarwalPHHRCJM16},
  cites = {0},
  citedby = {0},
  pages = {929-938},
  booktitle = {2016 International Joint Conference on Neural Networks, IJCNN 2016, Vancouver, BC, Canada, July 24-29, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-0620-5},
}