Single FU Bypass Networks for High Clock Rate Superscalar Processors - researchr publication authors

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Aneesh Aggarwal. Single FU Bypass Networks for High Clock Rate Superscalar Processors. In Luc Bougé, Viktor K. Prasanna, editors, High Performance Computing - HiPC 2004, 11th International Conference, Bangalore, India, December 19-22, 2004, Proceedings. Volume 3296 of Lecture Notes in Computer Science, pages 319-332, Springer, 2004. [doi]

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