VLSI Implementation of an Improved Multiplier for FFT Computation in Biomedical Applications - researchr publication related

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Arathi Ajay, R. Mary Lourde. VLSI Implementation of an Improved Multiplier for FFT Computation in Biomedical Applications. In 2015 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015, Montpellier, France, July 8-10, 2015. pages 68-73, IEEE Computer Society, 2015. [doi]

The following publications are possibly variants of this publication:

VLSI implementation of an improved multiplier for FFT computation in biomedical applicationsArathi Ajay, R. Mary Lourde. eit 2015: 6-12 [doi]

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