FPGA hardware architecture for stereoscopic image compression based on block matching, watermarking and hamming code

Ghattas Akkad, Moustapha ElHassan, Rafic Ayoubi. FPGA hardware architecture for stereoscopic image compression based on block matching, watermarking and hamming code. In International Image Processing, Applications and Systems, IPAS 2016, Hammamet, Tunisia, November 5-7, 2016. pages 1-5, IEEE, 2016. [doi]

@inproceedings{AkkadEA16,
  title = {FPGA hardware architecture for stereoscopic image compression based on block matching, watermarking and hamming code},
  author = {Ghattas Akkad and Moustapha ElHassan and Rafic Ayoubi},
  year = {2016},
  doi = {10.1109/IPAS.2016.7880065},
  url = {https://doi.org/10.1109/IPAS.2016.7880065},
  researchr = {https://researchr.org/publication/AkkadEA16},
  cites = {0},
  citedby = {0},
  pages = {1-5},
  booktitle = {International Image Processing, Applications and Systems, IPAS 2016, Hammamet, Tunisia, November 5-7, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-1645-7},
}