Performance per power optimum cache architecture for embedded applications, a design space exploration - researchr publication authors

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Mehdi Alipour, Kamran Moshari, Mohammad Reza Bagheri. Performance per power optimum cache architecture for embedded applications, a design space exploration. In Proceedings of the 2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, NESEA 2011, Perth, Australia, December 8-9, 2011. pages 1-6, IEEE, 2011. [doi]

This author has not been identified. Look up 'Mehdi Alipour' in GoogleThis author has not been identified. Look up 'Kamran Moshari' in GoogleThis author has not been identified. Look up 'Mohammad Reza Bagheri' in Google

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