A 10-bit 6.8-GS/s Direct Digital Frequency Synthesizer Employing Complementary Dual-Phase Latch-Based Architecture

Abdel Martinez Alonso, Masaya Miyahara, Akira Matsuzawa. A 10-bit 6.8-GS/s Direct Digital Frequency Synthesizer Employing Complementary Dual-Phase Latch-Based Architecture. IEICE Transactions, 99-C(10):1200-1210, 2016. [doi]

@article{AlonsoMM16,
  title = {A 10-bit 6.8-GS/s Direct Digital Frequency Synthesizer Employing Complementary Dual-Phase Latch-Based Architecture},
  author = {Abdel Martinez Alonso and Masaya Miyahara and Akira Matsuzawa},
  year = {2016},
  url = {http://search.ieice.org/bin/summary.php?id=e99-c_10_1200},
  researchr = {https://researchr.org/publication/AlonsoMM16},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {99-C},
  number = {10},
  pages = {1200-1210},
}