5-bit high-speed ferrite memory system: design and operation

H. Amemiya, T. R. Mayhew, R. L. Pryor. 5-bit high-speed ferrite memory system: design and operation. In Proceedings of the 1964 fall joint computer conference, part I, AFIPS 1964 (Fall, part I), San Francisco, California, USA, October 27-29, 1964. pages 123-145, ACM, 1964. [doi]

Authors

H. Amemiya

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T. R. Mayhew

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R. L. Pryor

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