A 32-bit Residue Arithmetic Unit for High Performance Embedded Systems

Behnam S. Arad, Sachin Rudrapatna. A 32-bit Residue Arithmetic Unit for High Performance Embedded Systems. In Gongzhu Hu, editor, 20th International Conference on Computers and Their Applications, CATA 2005, March 16-18, 2005, Holiday Inn Downtown-Superdome Hotel, New Orleans, Louisiana, USA, Proceedings. pages 320-325, ISCA, 2005.

@inproceedings{AradR05,
  title = {A 32-bit Residue Arithmetic Unit for High Performance Embedded Systems},
  author = {Behnam S. Arad and Sachin Rudrapatna},
  year = {2005},
  researchr = {https://researchr.org/publication/AradR05},
  cites = {0},
  citedby = {0},
  pages = {320-325},
  booktitle = {20th International Conference on Computers and Their Applications, CATA 2005, March 16-18, 2005, Holiday Inn Downtown-Superdome Hotel, New Orleans, Louisiana, USA, Proceedings},
  editor = {Gongzhu Hu},
  publisher = {ISCA},
  isbn = {1-880843-54-4},
}