A secure and area-efficient FPGA-based SR-Latch PUF

Amir Ardakani, Shahriar Baradaran Shokouhi. A secure and area-efficient FPGA-based SR-Latch PUF. In 8th International Symposium on Telecommunications, IST 2016, Tehran, Iran, September 27-28, 2016. pages 94-99, IEEE, 2016. [doi]

@inproceedings{ArdakaniS16,
  title = {A secure and area-efficient FPGA-based SR-Latch PUF},
  author = {Amir Ardakani and Shahriar Baradaran Shokouhi},
  year = {2016},
  doi = {10.1109/ISTEL.2016.7881790},
  url = {https://doi.org/10.1109/ISTEL.2016.7881790},
  researchr = {https://researchr.org/publication/ArdakaniS16},
  cites = {0},
  citedby = {0},
  pages = {94-99},
  booktitle = {8th International Symposium on Telecommunications, IST 2016, Tehran, Iran, September 27-28, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-3435-2},
}