A systematic procedure for deriving block-parallel, power efficient, digital filter architectures for highspeed data conversion

Paraskevas E. Argyropoulos, Hanoch Lev-Ari. A systematic procedure for deriving block-parallel, power efficient, digital filter architectures for highspeed data conversion. In 48th Asilomar Conference on Signals, Systems and Computers, ACSSC 2014, Pacific Grove, CA, USA, November 2-5, 2014. pages 559-562, IEEE, 2014. [doi]

@inproceedings{ArgyropoulosL14,
  title = {A systematic procedure for deriving block-parallel, power efficient, digital filter architectures for highspeed data conversion},
  author = {Paraskevas E. Argyropoulos and Hanoch Lev-Ari},
  year = {2014},
  doi = {10.1109/ACSSC.2014.7094507},
  url = {http://dx.doi.org/10.1109/ACSSC.2014.7094507},
  researchr = {https://researchr.org/publication/ArgyropoulosL14},
  cites = {0},
  citedby = {0},
  pages = {559-562},
  booktitle = {48th Asilomar Conference on Signals, Systems and Computers, ACSSC 2014, Pacific Grove, CA, USA, November 2-5, 2014},
  publisher = {IEEE},
  isbn = {978-1-4799-8297-4},
}