Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy

Arghavan Asad, Ozcan Ozturk 0001, Mahmood Fathy, Mohammad-Reza Jahed Motlagh. Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy. Microprocessors and Microsystems, 51:76-98, 2017. [doi]

Authors

Arghavan Asad

This author has not been identified. Look up 'Arghavan Asad' in Google

Ozcan Ozturk 0001

This author has not been identified. Look up 'Ozcan Ozturk 0001' in Google

Mahmood Fathy

This author has not been identified. Look up 'Mahmood Fathy' in Google

Mohammad-Reza Jahed Motlagh

This author has not been identified. Look up 'Mohammad-Reza Jahed Motlagh' in Google