Soft error hardening for logic-level designs

Hossein Asadi, Mehdi Baradaran Tahoori. Soft error hardening for logic-level designs. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]

@inproceedings{AsadiT06:0,
  title = {Soft error hardening for logic-level designs},
  author = {Hossein Asadi and Mehdi Baradaran Tahoori},
  year = {2006},
  doi = {10.1109/ISCAS.2006.1693540},
  url = {http://dx.doi.org/10.1109/ISCAS.2006.1693540},
  tags = {logic},
  researchr = {https://researchr.org/publication/AsadiT06%3A0},
  cites = {0},
  citedby = {0},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece},
  publisher = {IEEE},
}