Sakkarapani Balagopal, Vishal Saxena. A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-ΔΣ ADC with 1.5 cycle quantizer delay and improved STF. In 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012. pages 802-805, IEEE, 2012. [doi]
@inproceedings{BalagopalS12a, title = {A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT-ΔΣ ADC with 1.5 cycle quantizer delay and improved STF}, author = {Sakkarapani Balagopal and Vishal Saxena}, year = {2012}, doi = {10.1109/MWSCAS.2012.6292142}, url = {https://doi.org/10.1109/MWSCAS.2012.6292142}, researchr = {https://researchr.org/publication/BalagopalS12a}, cites = {0}, citedby = {0}, pages = {802-805}, booktitle = {55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012}, publisher = {IEEE}, isbn = {978-1-4673-2526-4}, }