Capacitive voltage multipliers: a high efficiency method to generate multiple on-chip supply voltages

R. Balczewski, Ramesh Harjani. Capacitive voltage multipliers: a high efficiency method to generate multiple on-chip supply voltages. In International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia. pages 508-511, IEEE, 2001. [doi]

@inproceedings{BalczewskiH01,
  title = {Capacitive voltage multipliers: a high efficiency method to generate multiple on-chip supply voltages},
  author = {R. Balczewski and Ramesh Harjani},
  year = {2001},
  doi = {10.1109/ISCAS.2001.921904},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.2001.921904},
  researchr = {https://researchr.org/publication/BalczewskiH01},
  cites = {0},
  citedby = {0},
  pages = {508-511},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia},
  publisher = {IEEE},
  isbn = {0-7803-6685-9},
}