Design of Low-Power High-Performance 2-4 and 4-16 Mixed-Logic Line Decoders

Dimitrios Balobas, Nikos Konofaos. Design of Low-Power High-Performance 2-4 and 4-16 Mixed-Logic Line Decoders. IEEE Trans. on Circuits and Systems, 64-II(2):176-180, 2017. [doi]

@article{BalobasK17,
  title = {Design of Low-Power High-Performance 2-4 and 4-16 Mixed-Logic Line Decoders},
  author = {Dimitrios Balobas and Nikos Konofaos},
  year = {2017},
  doi = {10.1109/TCSII.2016.2555020},
  url = {http://dx.doi.org/10.1109/TCSII.2016.2555020},
  researchr = {https://researchr.org/publication/BalobasK17},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {64-II},
  number = {2},
  pages = {176-180},
}