FPGA/DSP-based implementation of a high-performance multi-channel counter

F. Baronti, A. Lazzeri, Roberto Roncella, Roberto Saletti. FPGA/DSP-based implementation of a high-performance multi-channel counter. Journal of Systems Architecture, 55(5-6):310-316, 2009. [doi]

@article{BarontiLRS09,
  title = {FPGA/DSP-based implementation of a high-performance multi-channel counter},
  author = {F. Baronti and A. Lazzeri and Roberto Roncella and Roberto Saletti},
  year = {2009},
  doi = {10.1016/j.sysarc.2009.03.002},
  url = {http://dx.doi.org/10.1016/j.sysarc.2009.03.002},
  tags = {rule-based},
  researchr = {https://researchr.org/publication/BarontiLRS09},
  cites = {0},
  citedby = {0},
  journal = {Journal of Systems Architecture},
  volume = {55},
  number = {5-6},
  pages = {310-316},
}