DRAC: a dynamically reconfigurable active L1 cache model for hybrid prototyping of multicore embedded systems - researchr publication authors

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Ali Barzegar, Ehsan Saboori, Samar Abdi. DRAC: a dynamically reconfigurable active L1 cache model for hybrid prototyping of multicore embedded systems. In 25nd IEEE International Symposium on Rapid System Prototyping, RSP 2014, New Delhi, India, October 16-17, 2014. pages 86-92, IEEE, 2014. [doi]

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