Low Power Scheduling of DAGs to Minimize Finish Times

Sanjeev Baskiyar, Kiran Kumar Palli. Low Power Scheduling of DAGs to Minimize Finish Times. In Yves Robert, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna, editors, High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, Proceedings. Volume 4297 of Lecture Notes in Computer Science, pages 353-362, Springer, 2006. [doi]

@inproceedings{BaskiyarP06,
  title = {Low Power Scheduling of DAGs to Minimize Finish Times},
  author = {Sanjeev Baskiyar and Kiran Kumar Palli},
  year = {2006},
  doi = {10.1007/11945918_36},
  url = {http://dx.doi.org/10.1007/11945918_36},
  researchr = {https://researchr.org/publication/BaskiyarP06},
  cites = {0},
  citedby = {0},
  pages = {353-362},
  booktitle = {High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, Proceedings},
  editor = {Yves Robert and Manish Parashar and Ramamurthy Badrinath and Viktor K. Prasanna},
  volume = {4297},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {3-540-68039-X},
}